 Cheng Wan
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e703f9e566
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[refactor] Adopt get_parallel() everywhere and close out the parallel wrapper surface (#30492)
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2026-07-09 02:09:39 -07:00 |
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AMD-yanfeiwangandDuyi-Wang
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d74619b373
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[AMD] Enable JIT staged HiCache write-back and fix CPU-index crash (#28534)
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
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2026-07-09 01:22:37 -07:00 |
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Zhiqiang Xie
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f19246e59a
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[HiCache] write_back policy refinement (#29817)
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2026-07-02 12:16:03 -07:00 |
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13dc5f2dc7
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[HiCache][AMD] Add UMBP tiered DRAM + SSD L3 storage backend with hugepage host allocator (#25377)
Co-authored-by: TianDi101 ditian12@amd.com
Co-authored-by: Niko Ma nima@amd.com
Co-authored-by: Wu, Yutong yutong.wu@amd.com
Co-authored-by: figo fizhang@amd.com
Co-authored-by: AMD-yanfeiwang <yanfei.wang@amd.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-07-01 22:21:37 +08:00 |
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huangtingwei
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5e1ccd9320
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[HiCache] Optimize HiCache hash generation with bulk token byte conversion (#28287)
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2026-07-01 15:44:23 +08:00 |
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da0f4f6f92
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[HiCache] remove large host mem constraint (#28614)
Co-authored-by: Teng Ma <stmatengss@gmail.com>
Co-authored-by: Vladislav Nosivskoy <vladnosiv@gmail.com>
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2026-06-26 16:20:48 -07:00 |
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shuwenn
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ff1fc1fbdf
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[mem_cache][5/N] refactor: extract host KV cache base layer into pool_host package (#27273)
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2026-06-20 20:44:08 +08:00 |
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shuwenn
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941a11ada3
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[HiCache] refactor: remove unused transfer buffer (#26003)
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2026-06-19 09:46:04 +00:00 |
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huangtingweiandhzh0425
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6b7ecca663
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[HiCache]Support hybrid pool staged H2D kernel (#28434)
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-06-19 09:48:03 +08:00 |
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huangtingwei
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b5bcd76a41
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[HiCache & JIT Kernel] Refactoring HiCache Write-Back Kernel (#21631)
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2026-06-15 19:44:27 -07:00 |
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shuwenn
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f4029d0fc0
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[HiCache] fix: clear storage reset state (#26009)
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2026-06-12 23:51:26 -07:00 |
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Cheng Wan
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97a0031799
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[lint] Enable Ruff UP037 to drop redundant quoted annotations (#27984)
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2026-06-11 17:38:05 -07:00 |
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42fe025280
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[HiCache] Fix the compatibility between PP and HiCache (L2). (#27285)
Co-authored-by: ybyang <ybyang7@iflytek.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: shangmingc <csmthu@gmail.com>
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
|
2026-06-06 16:57:23 +08:00 |
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Zhanghengand晟海
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736263f3dc
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[UnifiedTree]: Support l3 storage for swa and deepseek v4 (#26881)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
|
2026-06-04 10:17:34 +08:00 |
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f4e7a98fe5
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[HiCache] feat: support draft offload for mooncake (#24984)
Co-authored-by: huangtingwei9988 <141888744+huangtingwei9988@users.noreply.github.com>
Co-authored-by: stmatengss <11641725+stmatengss@users.noreply.github.com>
|
2026-06-02 21:42:04 -07:00 |
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Ke Bao
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38d4c9ba88
|
Improve type annotations in unified radix cache (#26948)
|
2026-06-02 21:17:50 +08:00 |
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Lukas HumbelandClaude Opus 4.7
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d8a5a25c36
|
Refactor NIXL hicache. Add O_DIRECT support (#25173)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-06-01 17:28:53 +02:00 |
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fzyzcjy
|
e065445236
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Remove managers' unused fields (#25433)
|
2026-05-16 09:17:11 +08:00 |
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shuwenn
|
2c41ef4c93
|
[HiCache] feat: add draft KV cache backing for L2/L3 (#21125)
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2026-04-28 23:47:31 -07:00 |
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Vladislav Nosivskoy
|
28ee08c172
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[HiCache] Add synchronization for context parallelism (#20460)
Signed-off-by: Vladislav Nosivskoy <vladnosiv@gmail.com>
|
2026-04-28 02:13:07 +08:00 |
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efa71ce5ab
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[HiCache]Fix hybrid model move_indices (#22940)
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: flyerming <flyerming@163.com>
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2026-04-21 00:15:39 -07:00 |
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yuki-brook
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1ec018f27a
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[Feature] Add SiMM as sglang HiCache Storage backend (#18016)
|
2026-04-13 17:12:37 -07:00 |
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Shangming Cai
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1c76f322df
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[HiCache] Add CP support for HiCache (#20977)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
|
2026-04-10 17:52:51 +08:00 |
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Liangsheng Yin
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49cb7d546e
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Move hash utils out of hicache_storage to break CUDA import chain (#22214)
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2026-04-06 18:16:40 -07:00 |
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shuwenn
|
6c91590e1b
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[HiCache] refactor: hicache normalization flow and compatibility checks (#19669)
|
2026-03-20 18:38:44 -07:00 |
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huangtingwei
|
0a43229be1
|
Fix mooncake store write/read bandwidth logs (#18294)
|
2026-03-09 19:54:37 -07:00 |
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yuyu5333andzhangheng
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230fb55899
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[Performance] Decode Offload improves the long texts performance 100% through dynamic block offload. (#17216)
Co-authored-by: zhangheng <hzh0425@apache.org>
|
2026-03-08 17:16:53 +08:00 |
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Ke Baoandhzh0425
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5867c3fa80
|
Support HiCache for MambaRadixCache (#19663)
Co-authored-by: hzh0425 <hzh0425@apache.org>
|
2026-03-08 00:36:25 +08:00 |
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huangtingweiandhzh0425
|
d40cb2f725
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[HiCache] Support heterogeneous tp for hicache storage (#18541)
Co-authored-by: hzh0425 <hzh0425@apache.org>
|
2026-02-25 00:13:57 -08:00 |
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hxieandZhiqiang Xie
|
443b1a88d1
|
Add batched zero copy to NIXL backend (#18850)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2026-02-18 16:31:02 -08:00 |
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shuwenn
|
fd3b179ffd
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[HiCache][HA 1/N] Support HiCache storage runtime attach/detach (#15892)
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2026-01-26 19:33:19 -08:00 |
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PiteXChenandZhiqiang Xie
|
8b22deef5b
|
fix【hicache】fix the KV cache resource occupation and invalid loading from prefetch when pending requests are aborted. (#16369)
Signed-off-by: CLFutureX <chenyongqyl@163.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2026-01-15 15:14:38 -08:00 |
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bdde949619
|
[HiCache] Add PP Support with suffix pp rank (#15175)
Co-authored-by: Xuchun Shang <xuchun.shang@gmail.com>
Co-authored-by: ybyang <10629930+whybeyoung@users.noreply.github.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
|
2026-01-03 13:49:21 +08:00 |
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|
Xuchun Shang
|
4ab66d956f
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[HiCache] Fix deadlock when creating new group (#15805)
Signed-off-by: Xuchun Shang <xuchun.shang@gmail.com>
|
2025-12-29 17:13:04 +08:00 |
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khalilzhk
|
948b6acee8
|
[BugFix] fix prefixcache performance and accuracy on ascend (#13573)
|
2025-12-08 02:16:20 +08:00 |
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Even Zhou
|
894c0dc57c
|
[NPU][1/N] NPU basic functions refactor and new modelslim quant type (#13359)
|
2025-12-04 16:15:31 +08:00 |
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Zhiqiang XieandHao Chen
|
cfcf2758aa
|
[HiCache] Critical fix to host memory double free (#13501)
Co-authored-by: Hao Chen <cighao@gmail.com>
|
2025-11-18 01:34:23 -08:00 |
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pansichengandZhiqiang Xie
|
d879e37f1b
|
Add interface_v1 option for dynamic HiCache backend (#13140)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-11-17 17:42:17 -08:00 |
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2d531946db
|
[Ascend][feature] support L1+ L2 radixcache on ascend (#12214)
Co-authored-by: khalilzhk <zhangkaikai12@huawei.com>
Co-authored-by: Even Zhou <even.y.zhou@outlook.com>
|
2025-11-12 20:45:24 +08:00 |
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|
Chang Su
|
627974405d
|
[Lint] Add python/sglang to ruff F401 checks and remove unused imports in files (#11685)
|
2025-10-17 16:49:46 -07:00 |
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ee3bd8a1c8
|
feat(hicache): Support passing prefix keys for l3 store. (#9045)
Co-authored-by: pansicheng <sicheng.pan.chn@gmail.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-10-10 00:22:05 -07:00 |
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ykwdandZhiqiang Xie
|
bfa274380b
|
[HiCache] Configurable and Dynamic Prefetch Timeout (#10512)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-10-01 08:44:10 -05:00 |
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Shisong Maandmashisong
|
86cb4db058
|
[Feature] Add EIC as sglang HiCache Storage backend (#10271)
Co-authored-by: mashisong <mashisong@bytedance.com>
|
2025-10-01 08:43:34 -05:00 |
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|
2e130b7618
|
[HiCache]bug fix: fixed blank item in host_mem_release_queue (#11005)
Co-authored-by: Zuoyuan Zhang <zuoyuanzhang@ZuoyuandeMacBook-Pro.local>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-10-01 08:42:37 -05:00 |
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hzh0425andTeng Ma
|
c8a5d12abe
|
[HiCache]: Support dynamic loading backends for hicache (#10551)
Co-authored-by: Teng Ma <sima.mt@alibaba-inc.com>
|
2025-09-26 18:34:11 -07:00 |
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yi wang
|
fce170480a
|
integrate AIBrix KVcache (#10376)
|
2025-09-25 14:47:09 +08:00 |
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Zhiqiang Xie
|
3d40794fcf
|
[HiCache] Cleaning the deprecated host memory state (#10778)
|
2025-09-25 14:43:53 +08:00 |
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|
|
d4041a5eeb
|
refactor zero copy (#10300)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
Co-authored-by: huangtingwei <141888744+huangtingwei9988@users.noreply.github.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
|
2025-09-22 15:17:31 -07:00 |
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huangtingweiandZhiqiang Xie
|
b4c2c421e9
|
support memory_pool_host page first direct layout (#10031)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-09-11 23:19:44 -07:00 |
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DarkSharpnessandZhiqiang Xie
|
948b01a04c
|
[Refactor] Remove Hicache Load & Write threads (#10127)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
|
2025-09-08 22:18:50 -07:00 |
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