Commit Graph
202 Commits
Author SHA1 Message Date
Zhiqiang Xie 3dc91366ac [HiCache] write_back: reclaim duplicated host copy first under host pressure (#33777) 2026-08-07 15:59:59 -07:00
Zhangheng 12de7fb1f6 Remove the HiMambaRadixTree that is no longer in use (#33468) 2026-08-07 23:01:40 +08:00
Leon Gao 4d4f8023c4 [srt] Batch scheduler cache frees (#33475) 2026-08-06 21:49:59 -07:00
YAMY 2fc557254b fix(PP): size the mamba pool per pipeline stage, not per whole model (#33666) 2026-08-06 13:10:43 -07:00
Xinyuan Tong 31c1e5943f Facade DSA index-cache: MTP topk-reuse state + index-K storage (#28609) 2026-08-06 00:34:31 -07:00
Zhiqiang Xie 106bcc1293 Observability enhancement for HiCache (#32388) 2026-08-05 14:13:06 -07:00
Liangsheng Yin c0d5ebd6c4 [CI] Move CPU-only unit tests to the CPU suite and trim dead 5090 registrations (#33654) 2026-08-05 01:43:29 -07:00
+26 abddb1c7e9 [Kimi] Support kimi-k3 (#32541)
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Chunan Zeng <zcnrex@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
Co-authored-by: Zijie Xia <37504505+zijiexia@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: zhangxiaohao <1024393531@qq.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Julien Lin <jullin@nvidia.com>
Co-authored-by: Hao Phan <htphan@nvidia.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: RolaoDenthu <xinyisong0111@gmail.com>
Co-authored-by: pigeonsoup <32922982+pigeonsoup@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Pranjal Shankhdhar <pranjal.ssh@gmail.com>
Co-authored-by: Lee Nau <lee.nau@gmail.com>
Co-authored-by: HMING <126185151+Hearum@users.noreply.github.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
Co-authored-by: Cheng Wan <cheng.wan@radixark.ai>
Co-authored-by: BBuf <xiaoyu.zhang@radixark.ai>
Co-authored-by: Hanming Lu <hanminglu@meta.com>
Co-authored-by: Xinyi Song <xinyis10@illinois.edu>
2026-08-04 13:22:49 -07:00
huangtingweiandjackyYang6 3953788596 [HiSparse]Fix DeepSeek V4 HiSparse PD Transfers with Separate Host and Device KV Indices (#31901)
Co-authored-by: jackyYang6 <82102811+jackyYang6@users.noreply.github.com>
2026-08-03 20:35:04 +08:00
Cheng Wan b8109b5d63 config: retire the last process-global config field reads (#33338)
`get_server_args().<field>` reads one process's startup record. Nine sites still
did that for a value that has a namespace: the attention backend (5),
`skip_tokenizer_init` (2), the draft-aware `load_format`, and a chunked-prefill
size in `sglang.kernels`. They now read `get_exec().kernel` / `get_serving()` /
`get_model()` / `get_schedule()`, so they see the resolved value including
post-publish overrides.

The multimodal processor's device selection moves to the instance it was
constructed with rather than to a namespace: `base_gpu_id` differs per worker (the
encode-server DP workers each specialise their own copy), so no process-global
value can stand in for it, and engines sharing a tokenizer process each need their
own. Branch order, the NPU preprocess patches, and the case that leaves "device"
unset are unchanged.

What stays on `get_server_args()` is the derived API — `@property` and method
members computed from several fields plus the HF config
(`mamba_cache_chunk_size`, `get_model_config()`, `enable_mamba_extra_buffer*`) —
plus three config-intent reads of live-shadowed sizes, each of which needs an
answer the live topology property cannot give (the DSA indexer's PP gate must
short-circuit before touching the PP group, `allocation`'s DCP gate asks whether
DCP was configured at all, and the CUDA-IPC recycler runs where no group exists).

A new AST ratchet pins both shapes it can see — the direct call and an alias
bound from it in the same function — at 0 and 12 respectively, exempting the
derived APIs and those three sites by name. The alias-form baseline is not zero:
those reads are mostly per-runner fields in model code, and lowering them is the
next slice.

Two fixtures stopped faking config: `test_dllm_fdfo_kv_reuse` rebound
`allocation.get_server_args` to a SimpleNamespace, which silently stops
intercepting the moment a reader migrates; it publishes a real config instead.
2026-08-02 21:24:42 -07:00
Cheng Wan ebb1c88d23 config: stop writing config onto the published ServerArgs at three sites (#33334)
Each of these wrote a value after resolution so a later reader would find it on
the instance. None of them needed the instance: one write was redundant, and the
two that carry a value the resolved-config readback reports move to
get_context().override, which the readback overlays.

- The SM100 GDN prefill default was written onto ServerArgs and read back one
  line later by initialize_linear_attn_config. It is now the return value of
  flashinfer_gdn_prefill_default, threaded into initialize_linear_attn_config
  (an explicit --linear-attn-prefill-backend still wins) and recorded with
  get_context().override so /server_info reports the backend in effect.
- The XGrammar fallback recorded grammar_backend="none" on the instance. No code
  reads the field after the factory reads it once, but get_internal_state
  reports the whole resolved config, so the fallback now lands there instead:
  the readback tells the truth and the seed keeps the requested backend.
- UnifiedRadixCache.init_hicache re-applied the direct-IO layout fixup that
  __post_init__ already applies: init_hicache only runs when hierarchical cache
  is on, which is exactly when _handle_hicache normalizes page_first to
  page_first_direct (pinned by test_hicache_io_backend_and_mem_layout_
  compatibility::direct_with_page_first). Three fixtures reached the fixup by
  building ServerArgs(model_path="dummy"), whose resolution is skipped, so they
  now declare the layout resolution would have produced.

Writer ratchet 34 -> 31.
2026-08-02 21:22:05 -07:00
Yuwei AnandClaude Opus 5 1a3bea77f2 [Feat] DCP + HiCache L2 Support (ported from kimi-k3) (#33112)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-02 23:35:27 +08:00
056474cdb0 feat: Session-reference-aware Unified Radix Cache for agentic multi-turn workloads (#29173)
Co-authored-by: Ishan Dhanani <ishandhanani@gmail.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: ispobock <ispobaoke@gmail.com>
2026-08-02 13:43:55 +08:00
Cheng Wan 9b44695713 test: recover the config-namespace-migration deferrals (#33171)
The module-skipped tests injected config by faking get_server_args (a
SimpleNamespace stand-in patched onto the module) or by writing fields
onto a ServerArgs instance post-publish — both invisible to the namespace
accessors the production code now reads. Re-enable them by publishing the
config they need (get_context().override_server_args seeding, scoped per
test), asserting bag state where the old assertions checked instance
write-through (declare_load_time_override is bag-only), and extending the
per-runner stubs the code genuinely reads (kv_cache_dtype_str,
max_total_tokens, context_len).

The unified-radix-cache file (which grew a large hicache/insert-walk suite
while skipped) is recovered in the same change:

- test_cache_finished_req_strips_thinking (19 parametrized classes) wrote
  strip_thinking_cache onto the ServerArgs instance; the cache reads
  get_serving().strip_thinking_cache — use the serving bag's scoped
  override.
- test_shallower_crossing_backs_up_above_backuped_middle staged its
  broken-backup-continuity setup through insert_host, which now
  deliberately drops refills below an un-backed-up node under
  write-through (host_insert_dropped). Build the same tree state through
  an explicit backup + device eviction.

Every config-namespace-migration deferral is recovered, so the deferral
ratchet (test_migration_deferral_ratchet.py) has done its job and is
retired.
2026-08-01 08:59:27 -07:00
fb207b72b0 feat(kernels): port standalone Kimi K3 kernels (#32890)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: zhangxiaolei <zhangxiaolei.666@bytedance.com>
2026-08-01 13:26:47 +08:00
Khoa Pham 1496bfee93 [Kimi] Support DCP + DSpark (ported from kimi-k3 branch) (#32828) 2026-07-31 17:39:00 -07:00
Cheng Wan 55b6769b0e config: read resolved config via namespace accessors (#33013) 2026-07-31 15:06:59 -07:00
Cheng Wan d3222bcc3a [unified-memory] Support fa3, the default MLA backend on pre-Blackwell hosts (#33046) 2026-07-31 11:46:46 -07:00
luchangli 26486a957d Fix --hicache-size allocating ~2x host memory on hybrid Mamba (#32915) 2026-08-01 02:37:57 +08:00
Cheng Wan 33c27d8e7f [unified-memory] Let Kimi-Linear use the paged MLA attention backends (#32972) 2026-07-31 01:32:08 -07:00
Cheng Wan e23ccb15f0 [unified-memory] Support MLA-hybrid-Mamba (Kimi-Linear) on the Triton backend (#32971) 2026-07-30 22:10:34 -07:00
Qiaolin Yu f3fd869494 [gdn] support replayssm with extra buffer (#32692) 2026-07-30 21:34:37 -07:00
Liangsheng Yin c192145830 [Kernel] Fuse KV-cache writes for asymmetric K/V (head_dim != v_head_dim) (#32813) 2026-07-30 00:26:10 -07:00
ziang663andChao Shi eefb434d17 [PD+PP] Honor PP consensus for bootstrap and prealloc (#31869)
Co-authored-by: Chao Shi <chao.shi@alibaba-inc.com>
2026-07-30 01:19:17 +08:00
huangtingweiandalphabetc1 50029f05a3 [HiCache] Merge HiCache event checks to reduce decode overhead (#30511)
Co-authored-by: alphabetc1 <47200617+alphabetc1@users.noreply.github.com>
2026-07-29 23:48:48 +08:00
Ke Bao 50b029257f Skip mamba lock during decoding (#32228) 2026-07-29 21:53:28 +08:00
LZW 4c82bb3252 Add Mooncake tenant id support (#30256) 2026-07-29 18:17:41 +08:00
Liangsheng Yin cce5873513 [CI] Fail lint when a registered file's TestCase classes never run (#32735) 2026-07-29 00:45:01 -07:00
Liangsheng Yin c4fc241fd3 [Perf] Free KV pages by segment in the paged allocator without a device sync (#32701) 2026-07-28 22:24:16 -07:00
YAMY dd67452b4f [Cleanup] Move mamba-max-states-per-path validation into _handle_mamba_backend (#32502) 2026-07-28 14:21:21 -07:00
Zhangheng 60d6914f17 [UnifiedTree]: move /mem_cache/unifed_cache_component dir to /mem_cache/unified_cache (#32484) 2026-07-28 16:28:21 +08:00
Yiqi Yangandhzh0425 4ea17169b0 [UnifiedTree] fix: drop prefetched host refill under an un-backed-up parent (#31902)
Co-authored-by: hzh0425 <hzh0425@apache.org>
2026-07-27 13:53:02 +08:00
2c63a2f12b Fix --hicache-size allocating ~2x host memory on hybrid SWA (#32373)
Co-authored-by: cctry <cctry@fb.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
2026-07-25 17:19:44 -07:00
Jialin Ouyang cd145f840f Radix Cache Split: Spin off TreeCore (#29901) 2026-07-25 14:31:59 -07:00
7c4b22fae5 [Hicache][1/2]Support Mamba branching in Unified Radix Cache with HiCache (#31181)
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-07-25 19:44:40 +08:00
ebcb74abd4 feat(hicache): Add shared memory allocator for host KV cache (#29326)
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-07-25 12:05:37 +08:00
Zhiqiang Xie 5da0b6ec39 Write-back policy fix for unified tree (#31845) 2026-07-24 09:58:18 -07:00
Jialin Ouyangandhzh0425 70ac0c4b0e [UnifiedRadixCache][mamba] Fix mamba state corruption and slot leak when load_back aborts (#30986)
Co-authored-by: hzh0425 <hzh0425@apache.org>
2026-07-23 18:48:31 +08:00
YAMY c18919f8f3 [Mamba] Add a per-path cap for cached states (#31230) 2026-07-23 17:58:36 +08:00
huangtingwei 86e1bb584d [HiCache] Add model-aware key isolation to Mooncake Store (#31920) 2026-07-23 10:20:13 +08:00
Cheng Wan e1479cc966 config: route runtime config adjustments through the namespace bags (#31812) 2026-07-22 01:17:22 -07:00
3217b7e3ce fix(hicache): support staged write-back for asymmetric MHA (#30981)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-07-22 09:58:49 +08:00
Chenchen HongandXiaoyu Zhang 49b9c46f41 [dLLM] Reuse block KV/req slots in place across FDFO rounds (#27877)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-07-20 13:36:13 +08:00
Feng Yao 942bf04ef9 [Scheduler] Add SGLANG_FORCE_COARSE_WAR_BARRIER opt-in for a whole-forward WAR barrier (#29353) 2026-07-19 00:28:49 -07:00
Liangsheng Yin 10908a6793 [Fix] Respect cache_protected_len in ChunkCache and disabled-radix release paths (#31662) 2026-07-18 12:04:25 -07:00
Ke Bao 5609f8e509 Reset only the used mamba state on radix cache hit (#31643) 2026-07-19 00:40:02 +08:00
Ke Bao 48ae829f6e Reset only the used mamba state on unified radix cache (#31648) 2026-07-18 21:43:13 +08:00
Sam (Kesen Li) ec6a3163b7 [Feature] Add FP4 KV Cache Design and support SM120 GPUs (#21601) 2026-07-17 14:49:43 -07:00
huangtingweiandZhangheng 44e3dd2713 [HiCache] Optimize HiCache host pool free-list release (#30658)
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-07-17 14:52:08 +08:00
Bob ChenandZhiqiang Xie 7cd55c6818 [HiCache] Optimize L2 mem allocation when cache miss in L3 (#19320)
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
2026-07-16 15:00:53 -07:00