 Liangsheng Yin
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c95454b341
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speculative: drop dead params/returns/no-ops (#24865)
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2026-05-09 15:53:31 -07:00 |
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Charles Chen
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12f42f2e7e
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Support Gemma3/4 + Eagle3 (#23976)
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2026-05-09 13:34:56 -07:00 |
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luchangliandZhangheng
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8087e07d52
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[UnifiedRadixTree]: Align cache_empty_result with RadixTree (#24779)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-05-09 23:52:22 +08:00 |
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ef5e9f8aba
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[DSV4] Cherry pick missing commits from deepseek_v4 branch and enhance tests (#24793)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: yueming-yuan <yym022502@gmail.com>
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2026-05-09 04:15:37 -07:00 |
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Brayden Zhongandb8zhong
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4b23f6bdc5
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Fix performance regression on Deepseek V3 on moe-runner-backend=triton on SM90 (#24562)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-09 03:49:12 -07:00 |
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Brayden Zhongandb8zhong
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05d1ab51e8
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Enable PDL for various kernels in DSV32/GLM5 (#23965)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-09 03:42:56 -07:00 |
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shuwenn
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d5564c2a96
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fix(fa3): translate page table to SWA loc in EAGLE3 topk>1 spec metadata (#24617)
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2026-05-09 18:22:45 +08:00 |
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JoyFuture
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a309f1f8f4
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fix(cuda_graph): zero out_cache_loc_swa on pad and use int32 (hybrid-SWA accuracy fix) (#24743)
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2026-05-09 18:22:12 +08:00 |
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Brayden Zhongandb8zhong
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f4b7e73699
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Enable trtllm-gen BF16 MoE for MTP (#24260)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-09 03:14:17 -07:00 |
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sglang-npu-bot
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f1a9a455e0
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Revert "[NPU] fix profiler on npu" (#24815)
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2026-05-09 17:53:02 +08:00 |
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zhaozx-cn
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e2527df8b6
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[NPU] fix profiler on npu (#24685)
Signed-off-by: zhaozx-cn <zhaozx2116@163.com>
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2026-05-09 17:48:24 +08:00 |
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Jia Guo
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fd636410a2
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Restrict fa_skip_kv_cache to non-MLA backends (#24097)
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2026-05-09 09:25:02 +00:00 |
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Brayden Zhongandb8zhong
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8f33bee31b
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Reland Cute-DSL FP4 dense GEMM (#23590)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-09 02:20:58 -07:00 |
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Yuxuan Zhang
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d49fc092cb
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[Bug Fix] GLM-5.1: drop constexpr on page_indice_batch_offset, skip offloader post_init on draft worker, support N=32 in copy_to_gpu_no_ce (#23550)
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2026-05-09 15:43:45 +08:00 |
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Liangsheng Yin
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78da0d3106
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[Spec] Move accept_tokens off EagleDraftInput; pass via method arg (#24735)
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2026-05-08 23:24:18 -07:00 |
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Chi McIsaac
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8e534e8f15
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[diffusion] fix: fix diffusers executor crash when component residency manager is absent (#24573)
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2026-05-09 11:45:06 +08:00 |
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storyicon
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590b13b513
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[diffusion] fix: fix NCCL deadlock in ulysses sp when sequence length has remainder (#24694)
Signed-off-by: storyicon <storyicon@foxmail.com>
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2026-05-09 11:05:37 +08:00 |
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Polisetty V R K Jyothendra VarmaandMa Mingfei
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50ed01674e
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fix is_arch_support_pdl function usage (#24600)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-05-09 09:39:34 +08:00 |
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Liangsheng Yin
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1613bae412
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[Spec] Disambiguate verified_id into bonus_token(s) / accept_tokens (#24724)
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2026-05-08 18:24:33 -07:00 |
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Yuan Luoandluoyuan.luo
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a61a14f416
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[KDA] Optimize prefill kernels with diagonal and recompute fuse (#24271)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-05-09 08:52:51 +08:00 |
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Brayden Zhongandb8zhong
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9ee830346f
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Disable Custom AR V2 when in multi-node (#24729)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-08 17:50:05 -07:00 |
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d1c5937428
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env: add SGLANG_RADIX_FORCE_MISS to force radix prefix-cache miss (#24726)
Co-authored-by: sihan-zzz <228612289+sihan-zzz@users.noreply.github.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-08 17:46:38 -07:00 |
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YAMY
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560829a171
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feat(scheduler): add adaptive queue-based prefill delayer trigger (#23189)
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2026-05-08 16:54:30 -07:00 |
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YAMY
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6971a03fe6
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fix(fa3): skip scheduler_metadata precompute under DP attention (#24632)
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2026-05-08 16:19:20 -07:00 |
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Niko Ma
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62c2e091f6
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[PD] MORI-IO: Add state transfer, inline transfer model, and high-concurrency fixes (#22665)
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2026-05-08 16:07:22 -07:00 |
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Jimmy Shongandgemini-code-assist[bot]
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fa8985486e
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[test/fix]: isolate VLM MMMU eval output dirs to fix nightly-4-gpu cross-test pollution (#24623)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-05-08 15:01:53 -07:00 |
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Jimmy Shong
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096ad02b06
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[Model] Laguna-XS.2 Model Support (#24204)
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2026-05-09 05:43:13 +08:00 |
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Cheng Wan
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7b707c9222
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disable the combination of --enable-two-batch-overlap and --enforce-s… (#24720)
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2026-05-08 14:27:35 -07:00 |
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Yuhao Yang
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09912fd89d
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Remove unnecessary bf16 assert in rotate_activation (#24686)
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2026-05-09 05:00:52 +08:00 |
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Yilong Zhao
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f30d1d0b0a
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logits: remove blocking H2D copy (#24627)
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2026-05-08 13:22:13 -07:00 |
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Ethan Feng
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672f778512
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[NemotronH] Fix expert scale weight loading (#24434)
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2026-05-08 12:37:06 -07:00 |
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zhongdaor-nvandzhongdaor-nv
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2cf1a4ab38
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feat: Add KV events for Mamba radix cache (#23678)
Signed-off-by: zhongdaor-nv <220807034+zhongdaor-nv@users.noreply.github.com>
Co-authored-by: zhongdaor-nv <220807034+zhongdaor-nv@users.noreply.github.com>
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2026-05-08 11:53:36 -07:00 |
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Lianmin Zheng
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e40e339c72
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Filter non-int token ids in benchmark and observe decode-side bootstrap/alloc metrics (#24684)
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2026-05-08 11:45:37 -07:00 |
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Mick
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73b8eda103
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[diffusion] fix: fix FA3 varlen out argument handling (#24688)
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2026-05-08 19:01:49 +08:00 |
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fanxingranandfanxingran
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7f8e7a9130
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fix(aiter): drop FP8 KV upcast; use native FP8 path in paged_attentio… (#24129)
Co-authored-by: fanxingran <fanxingran@amd.com>
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2026-05-08 02:47:48 -07:00 |
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jacky.cheng
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f21d4868dc
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[AMD] Replace naive triton RMSNorm with aiter RMSNorm for diffusion model (#24360)
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2026-05-08 02:44:13 -07:00 |
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YC Yen-Ching Tseng
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e1150f66db
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[AMD][diffusion] Temporal-unfolded batched Conv2D for ROCm VAE decode (#22971)
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2026-05-08 02:32:14 -07:00 |
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Brayden Zhongandb8zhong
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80d0226b68
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Turn on JIT custom AR implementation by default (#24363)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-08 02:05:31 -07:00 |
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HAI
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73792629d4
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[AMD] Intro SGLANG_DIFFUSION_AITER_FP8_ATTN (#24677)
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2026-05-08 01:31:00 -07:00 |
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jacky.cheng
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b22d3cd606
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[AMD] Support fp8 MLA for diffusion model (#20319)
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2026-05-08 00:56:24 -07:00 |
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Yibo Cai
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55d8223c2b
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[sgl-kernel/cpu] support w8a8 int8 model for arm cpu (#16045)
skip gpu test as this one is not related to gpu backend.
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2026-05-08 14:47:06 +08:00 |
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JoyFuture
|
e1bc001872
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fix(mimo_v2): auto-disable multimodal when vision/audio configs are absent (#24652)
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2026-05-08 13:40:08 +08:00 |
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maocheng23andlawrence-harmonic
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7deed98e1b
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[fix] /pause_generation and /continue_generation wrong for --tokenizer-worker-num > 1 (#24462)
Co-authored-by: lawrence-harmonic <185285563+lawrence-harmonic@users.noreply.github.com>
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2026-05-07 21:32:21 -07:00 |
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Mick
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2afb450501
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[diffusion] optimize: optimize frame returns path (#24616)
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2026-05-08 12:10:09 +08:00 |
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cdf5771f91
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[MUSA][17/N] ci: Add MUSA diffusion, sgl-kernel tests, and CI workflow support (#20672)
Co-authored-by: ximin.chen <ximin.chen@mthreads.com>
Co-authored-by: R0CKSTAR <xiaodong.ye@mthreads.com>
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2026-05-07 20:45:21 -07:00 |
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5fa3bb2eaf
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Enable flashinfer::trtllm_allreduce_fusion with PDL (#23765)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-05-08 10:41:10 +08:00 |
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shuwennandQiaolin-Yu
|
d9dddd4d7d
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[SPEC V2][2/N] feat: adaptive spec support spec v2 (#23336)
Co-authored-by: Qiaolin-Yu <liin1211@outlook.com>
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2026-05-07 18:33:47 -07:00 |
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+6
|
35870d55ac
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Deepseek V4 (#23882)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Co-authored-by: fzyzcjy <ch271828n@outlook.com>
Co-authored-by: ispobock <ispobaoke@gmail.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
Co-authored-by: yueming-yuan <yym022502@gmail.com>
Co-authored-by: DarkSharpness <2040703891@qq.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: yhyang201 <yhyang201@users.noreply.github.com>
Co-authored-by: yhyang201 <yhyang201@gmail.com>
Co-authored-by: Qiaolin Yu <90088090+qiaolin-yu@users.noreply.github.com>
Co-authored-by: Ethan (Yusheng) Su <11704492+yushengsu-thu@users.noreply.github.com>
Co-authored-by: Mingyi <27337995+wisclmy0611@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Yihao Wang <42559837+againstentropy@users.noreply.github.com>
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2026-05-07 18:32:21 -07:00 |
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Mandepudi Rani ChowdaryandMa Mingfei
|
55224fff08
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Add Arm64 CPU Phase 1A CI bootstrap (#22123)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-05-08 09:28:23 +08:00 |
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Lianmin Zheng
|
3c3f0bd55e
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Cache empty MatchResult in RadixCache (#24470)
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2026-05-07 17:13:20 -07:00 |
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