 Baizhou Zhang
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c312cdd3a7
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Upgrading tvm-ffi/sgl-deep-gemm/tilelang (#29554)
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2026-07-01 12:32:18 -07:00 |
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Zhihao Wang
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779ea4a9b5
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[RL] fix deepseek v4 MXFP8 flashinfer_trtllm_routed MoE weight update (#28676)
Signed-off-by: zhihaow6 <zhihaow6@illinois.edu>
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2026-07-01 12:29:08 -07:00 |
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eb75d990f7
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[Bugfix] compressed-tensors WNA16 MoE: don't assume a "Linear" config group (#29761)
Signed-off-by: Joe Rowell <joerowell4@gmail.com>
Co-authored-by: Jiminator <jimmysh341@gmail.com>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
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2026-07-01 18:08:09 +00:00 |
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Kangyan-ZhouandClaude Opus 4.8
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30c9801b39
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[disagg] Fix KV-event publisher port collision under pure data parallelism (#29211)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-07-01 10:57:34 -07:00 |
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Mick
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03b9278da0
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[diffusion] CI: tighten multimodal-gen consistency thresholds (#29824)
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2026-07-02 01:32:51 +08:00 |
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13dc5f2dc7
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[HiCache][AMD] Add UMBP tiered DRAM + SSD L3 storage backend with hugepage host allocator (#25377)
Co-authored-by: TianDi101 ditian12@amd.com
Co-authored-by: Niko Ma nima@amd.com
Co-authored-by: Wu, Yutong yutong.wu@amd.com
Co-authored-by: figo fizhang@amd.com
Co-authored-by: AMD-yanfeiwang <yanfei.wang@amd.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-07-01 22:21:37 +08:00 |
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huangtingwei
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1e80d938ff
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[HiCache]fix draft host pool allocator type (#29823)
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2026-07-01 19:31:16 +08:00 |
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Mick
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79f334b1aa
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[diffusion] CI: add 5090 job (#29791)
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2026-07-01 19:09:43 +08:00 |
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Lukas Humbel
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7d9de81cda
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feat(hicache): Use NIXL path-mode (#27060)
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2026-07-01 02:59:45 -07:00 |
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Mohammad Miadh Angkad
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07ca24372b
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Add fused EH norm for DeepSeek NextN (#29667)
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2026-07-01 02:46:21 -07:00 |
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Daniel Stokes
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8ee200972e
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[fix] Add support for flashinfer MOE A2A to Qwen3 BF16 model path (#26255)
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2026-07-01 01:59:54 -07:00 |
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ashwini rathiandSinghal, Shubham
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5134dcdcab
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[Intel XPU] Initially add nightly GSM8K accuracy tests for Llama-3.1-8B (TP=2) and Qwen3-32B (TP=4) (#28908)
Co-authored-by: Singhal, Shubham <shubham.singhal@intel.com>
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2026-07-01 16:27:24 +08:00 |
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Bingxu Chen
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81a472efcc
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[AMD] Update ROCm AITER pin to 9127c94 (#29816)
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2026-07-01 01:09:11 -07:00 |
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huangtingwei
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5e1ccd9320
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[HiCache] Optimize HiCache hash generation with bulk token byte conversion (#28287)
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2026-07-01 15:44:23 +08:00 |
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Xiaoyu Zhang
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8205aa3603
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chore: clean diffusion dead code (#29789)
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2026-07-01 15:42:16 +08:00 |
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Shijin Zhang
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00e12cebb4
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[Fix]: Defer DSA MLA CP KV gather for fp8 trtllm prefill in PD mode (#29161)
Signed-off-by: Shijin Zhang <75300765+Dovis01@users.noreply.github.com>
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2026-07-01 00:20:12 -07:00 |
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zhaozx-cn
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721350656d
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[NPU] Fix glm 4.6v (#29381)
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2026-07-01 15:13:48 +08:00 |
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Jialin Ouyang
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40594bd381
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[passthrough] engine: zstd request-body decompression + header overrides (#29684)
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2026-06-30 23:48:56 -07:00 |
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Xiaoyu Zhang
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47ae1241d3
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[CI] Relax ModelOpt NVFP4 diffusion consistency thresholds (#29767)
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2026-07-01 14:45:08 +08:00 |
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Xiaoyu Zhang
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fcb9f229b3
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[KDA-Pilot] Add LTX2 QKNorm split-RoPE CUDA fast path (#29708)
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2026-07-01 14:42:07 +08:00 |
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Chang Min Bark
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41779d56fd
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fix: make write_token dynamic (#29271)
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2026-06-30 22:55:57 -07:00 |
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Tai An
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546d6e23ad
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fix(mlx): default prefill_aware_swa=False on MlxModelRunnerStub (#29681)
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2026-06-30 22:55:43 -07:00 |
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Lijuan Tang
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3cdc2415b1
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[MLX] Fix step-bounded profiling for bench tools on Apple Silicon (#29217)
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2026-06-30 22:55:29 -07:00 |
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5de66d7fbc
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[EPD][BugFix] Fix encoder health check with global cache TP (#29296)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
Co-authored-by: siyu <liusy58@linux.alibaba.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-07-01 11:04:03 +08:00 |
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zhangxiaolei
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56f22cd520
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Optimize C128 state pool allocation using request state pool (#28612)
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2026-06-30 19:11:29 -07:00 |
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Shijin Zhang
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5b76f55d90
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[Fix]: Inline H2D during CUDA graph capture to avoid stream isolation in Offloader (#29166)
Signed-off-by: Shijin Zhang <75300765+Dovis01@users.noreply.github.com>
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2026-06-30 17:49:58 -07:00 |
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weireweireandweireweire
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a01afdd526
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Support real draft tokens to simulated acceptance (#29645)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-06-30 17:22:05 -07:00 |
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53c61bd5e6
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[bug2] skip swa recovery on locked full kv (#29352)
Co-authored-by: Zhangheng <hzh0425@apache.org>
Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com>
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2026-06-30 16:07:06 -07:00 |
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Yuzhen Zhou
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99b8f36cb1
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Skip custom all-reduce v2 CUDA graph capture with torch memory saver. (#27948)
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2026-06-30 14:53:29 -07:00 |
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TzZtzt
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e721259079
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typo-fix: correct mooncake package name to "mooncake-transfer-engine" (#25153)
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2026-06-30 11:54:36 -07:00 |
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Feng Yaoandispobock
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1c2523b719
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[bug1] keep full kv when swa skips leaf data (#29351)
Co-authored-by: ispobock <ispobaoke@gmail.com>
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2026-07-01 00:51:18 +08:00 |
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cf36dca6d4
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[JIT Kernel] Triton moe fused gate (#25835)
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: ziyi.xu <ziyi.xu@radixark.ai>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-06-30 23:26:18 +08:00 |
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Yihao WangandClaude Opus 4.8
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a531d81c19
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[diffusion][cache-dit] support Krea-2 + run-driven has_separate_cfg (#29688)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-06-30 08:22:05 -07:00 |
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Estrella-xx
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c6a7c98ae4
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[NPU]GLM-4.7-Flash optimize with fused kernels (#29509)
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2026-06-30 19:22:19 +08:00 |
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nvjullin
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2f730e299f
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Disable dsr1 prefill cudagraphs by default (#28053)
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2026-06-30 16:34:44 +08:00 |
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Stanley Winata
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a5e6dd3767
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[AMD] Implement QuarkW4A8MXFp4MoE to support amd/gpt-oss-120b-w-mxfp4-a-fp8 (#27204)
Signed-off-by: Stanley Winata <stanley.winata@amd.com>
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2026-06-30 01:24:22 -07:00 |
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89620b9169
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[NPU] Support DeepSeek V4 Flash MTP on Ascend (#28980)
Co-authored-by: Kurkur <mccllm@qq.com>
Co-authored-by: gjsheu <gjsheu@163.com>
Co-authored-by: root <root@localhost.localdomain>
Co-authored-by: khalil2ji3mp6 <khalilzhk@gmail.com>
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2026-06-30 16:22:13 +08:00 |
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cctryandcctry
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4b4b4af583
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Budget EAGLE/STANDALONE draft KV pool in SWA pool configurators (#29622)
Co-authored-by: cctry <cctry@fb.com>
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2026-06-30 00:58:33 -07:00 |
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silencejade
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ff51acd67b
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[NPU] Qwen3-VL-8B use split_qkv_rmsnorm_rope for extend (#29627)
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2026-06-30 15:55:50 +08:00 |
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Mohammad Miadh Angkad
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bae78a44da
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[Deps] Bump transformers to 5.12.1 (#29393)
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2026-06-30 00:54:01 -07:00 |
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Thomas Wang
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f920a37da4
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[AMD] Copy decode result on forward_stream instead of copy_stream (#29642)
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2026-06-29 23:53:48 -07:00 |
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Mohammad Miadh Angkad
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b6fceaa789
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[DSA] Use cos_sin_cache for DSA indexer fusion (#29613)
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2026-06-29 23:49:00 -07:00 |
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54e71506b3
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[AMD][DSV4] Remove per-batch D2H syncs in MTP to avoid bubbles between 2 batches (#29420)
Co-authored-by: amd-danli103 <amd-danli103@users.noreply.github.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
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2026-06-29 22:39:59 -07:00 |
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yifei wuandXinyuan Tong
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f41d455f37
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[Model] Add HrmTextForCausalLM (Hierarchical Reasoning Model - Text) (#27887)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-06-30 13:32:32 +08:00 |
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Mick
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2068ae7eec
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[diffusion] chore: document VAE decode parallel group axes (#29364)
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2026-06-30 12:14:55 +08:00 |
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Xiaoyu ZhangandClaude Opus 4.8
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3add35e26d
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[Diffusion] Reuse shared AlignedVector and tidy jit_kernel/diffusion (#29664)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-06-30 11:38:22 +08:00 |
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Mohammad Miadh Angkad
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3a72d02415
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[DSA] Optimize DSA CUDA graph replay metadata generation (#29499)
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2026-06-29 19:53:23 -07:00 |
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Mick
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25b6051c70
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[diffusion] warmup: default to model sampling resolution (declare Z-Image default) (#29519)
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2026-06-30 10:32:11 +08:00 |
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Ho-Ren (Jack) Chuang
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bc8b3ab1f5
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[Kernel] Add SM90 Q8KV8 FP8 Sparse MLA Prefill JIT Kernel with Tests and Benchmark (#25751)
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2026-06-30 09:00:11 +08:00 |
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Ho-Ren (Jack) Chuang
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a6bc432fd8
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[Perf][Kernel] Fuse SiLU+Mul into NVFP4 Expert Quantization for CUTLASS MoE (#18612)
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2026-06-29 16:51:01 -07:00 |
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