 Zhonghua Deng
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be45745f38
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[EPD] fix: zmq PUSH socket reconnect-aware connection management with tcp keepalive (#27039)
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2026-06-11 19:32:31 +08:00 |
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Mohammad Miadh Angkad
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7e245afefe
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[CI] Fix registered sigmoid gate mul test location (#27909)
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2026-06-11 18:52:37 +08:00 |
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Mohammad Miadh Angkad
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6ac9f66596
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Remove MoE prefill CUDA graph disable guard (#27841)
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2026-06-11 18:30:15 +08:00 |
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luoroger37
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54cba63b6c
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Fix paged SWA free mapping cleanup (#27779)
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2026-06-11 18:25:24 +08:00 |
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jacky.cheng
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22c7285a26
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[AMD] Fuse sigmoid + mul attention output gate into single Triton kernel (#27630)
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2026-06-11 02:05:05 -07:00 |
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jacky.cheng
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f4b3b99413
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[AMD] Enable fused GDN QKV split Triton kernel on HIP (#27583)
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2026-06-11 02:01:27 -07:00 |
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Liangsheng Yin
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493bb6ae0d
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Fix fp16 NaN flake in spec CI: bf16 eagle fixture; sanitize NaN logits in sampler (#27883)
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2026-06-11 01:16:12 -07:00 |
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kkandwunhuang
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b8376aebd0
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[AMD] Fix the dsv4 performance of MoE issue. (#27858)
Co-authored-by: wunhuang <wunhuang@amd.com>
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2026-06-11 01:06:54 -07:00 |
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gaopengff
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dc1e46ec8f
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[Intel GPU]Add sycl mrope pass for xpu device (#27646)
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2026-06-11 12:25:55 +08:00 |
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Zhangheng
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5e0271536a
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[UnifiedTree]: HybridModel launches HiCache via UnifiedTree by default. (#27759)
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2026-06-11 12:03:36 +08:00 |
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Zilin Zhu
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9788c8e867
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[RL] Handle Mooncake buffers across memory release (#27696)
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2026-06-11 11:15:00 +08:00 |
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YAMY
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f8b0a120b8
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fix: DSV4 BCG compress-prefill plan OOB on underfilled (tiny) prefill replay (#27747)
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2026-06-10 20:02:24 -07:00 |
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Cheng Wan
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f4f30d7d23
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[Fix] Use int64 seq_lens across all CUDA graph runners and backends (#27840)
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2026-06-10 19:54:58 -07:00 |
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Yihao Wang
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b4bed8c398
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[diffusion] fix: cast to float32 (from float64) in triton kernel to unblock torch.compile (#27709)
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2026-06-11 10:29:21 +08:00 |
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David Wang
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588d1f7bc9
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[Feature] Spec V2 DFlash Support (#23000)
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2026-06-10 19:27:42 -07:00 |
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Hexq0210
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475e9d25bf
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bugfix for npu mtp graph runner (#27808)
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2026-06-11 10:09:50 +08:00 |
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YanbingJiang
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66989a7642
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Fix gpt-oss-20b with mxfp4 support for Xeon (#27782)
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2026-06-11 09:16:16 +08:00 |
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fxmarty-amd
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99ab90c5b7
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[AMD] Restore AMD piecewise CUDA graph support dropped by #23906 (#27811)
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2026-06-10 17:43:48 -07:00 |
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Lijuan TangandClaude Opus 4.8
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5f913c1135
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[Fix] Emulate PDEATHSIG on macOS to prevent orphaned worker processes (#27190)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-06-10 17:43:27 -07:00 |
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Yongji Wuandhzh0425
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db061e97c0
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[Unified] Fix UnifiedRadixCache write_backup issue in write-back mode(#27108)
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-06-11 08:28:24 +08:00 |
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740305e1d9
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[HiCache] Add opt-in LRU eviction to file storage backend (CP-aware) (#26670)
Co-authored-by: Zhangheng <hzh0425@apache.org>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-06-11 08:21:59 +08:00 |
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Liangsheng Yin
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16124fc9b2
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[Metrics] Fix fwd_occupancy reading NaN on every decode log line; probe-free base-a (#27836)
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2026-06-10 15:42:19 -07:00 |
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Mohammad Miadh Angkad
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bdf3ef6421
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[CI] Fix registered QK Gemma RMSNorm test location (#27839)
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2026-06-10 15:21:59 -07:00 |
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jacky.cheng
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0da18f8d91
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[AMD][Perf] Fuse QK RMSNorm + gate extraction Triton kernel for Qwen3.5 on HIP (#27656)
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2026-06-10 14:29:33 -07:00 |
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Baizhou Zhang
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3c1b0fb226
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[1/n] [CP] Simplify prefill context parallel server args (#27312)
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2026-06-10 14:11:38 -07:00 |
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Liangsheng Yin
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5fefe91289
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[Spec] NGRAMWorker on BaseSpecWorker; algo-owned verify-tree shape params (#27799)
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2026-06-10 12:38:16 -07:00 |
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shuwennandQiaolin Yu
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3600a9ac5f
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[SPEC] feat: init adaptive spec params from config (#27493)
Co-authored-by: Qiaolin Yu <liin1211@outlook.com>
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2026-06-10 18:55:25 +00:00 |
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billishyahaoandHAI
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0ae27405d0
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[AMD] Support eplb for moriep (#22985)
Co-authored-by: HAI <hixiao@gmail.com>
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2026-06-10 10:23:51 -07:00 |
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Kai-Hsun Chen
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8c6bbe0658
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[deepseek] Enable DP attention + TBO + shared experts fusion (#27510)
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2026-06-10 09:42:27 -07:00 |
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502bc89e1b
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[AMD] Fix DeepSeek V4 Pro c128 state tensor dtype mismatch error and c4_sparse_raw_indices attribute error in cuda graph phase (#27529)
Co-authored-by: YC Yen-Ching Tseng <yctseng@amd.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
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2026-06-10 08:30:48 -07:00 |
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Yuan Luoandluoyuan.luo
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518e35fae7
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[KDA] Add CuteDSL Prefill Kernel on SM100 (#27488)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-06-10 21:25:19 +08:00 |
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111009ea54
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[Feature] [Ngram spec] Support ngram spec v2 (#17260)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Ratish P <114130421+Ratish1@users.noreply.github.com>
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2026-06-10 02:46:00 -07:00 |
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ChengYao-amdandgithub-actions[bot]
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255843d454
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Support for Zyphra zaya1 model (#26347)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
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2026-06-10 02:44:47 -07:00 |
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Cheng Wan
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70c71ba183
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[NPU] Fix dead patch_model monkey-patch breaking NPU torch.compile capture (#27774)
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2026-06-10 01:15:50 -07:00 |
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Ziang Li
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01f10acd06
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Implement online nvfp4 quantization (#26083)
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2026-06-10 00:26:51 -07:00 |
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Thomas WangandXinyi Song
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f2bcdb0508
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[AMD] Add unified kv attention support in dpsk-v4 (#27380)
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
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2026-06-09 23:13:37 -07:00 |
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Cheng Wan
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95d8a75bc9
|
Bundle set_kv_buffer write targets into KVWriteLoc (loc + swa_loc) (#27695)
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2026-06-09 23:09:51 -07:00 |
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Cheng Wan
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758fd4bb9a
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[SWA] Cache full→SWA out_cache_loc per forward across attention backends (#27617)
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2026-06-09 22:57:51 -07:00 |
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Aleksi Vesanto
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08ceb96ea5
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[diffusion] fix: remove boolean arithmetic guard to fix compiling (#27065)
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2026-06-10 13:55:47 +08:00 |
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Liangsheng Yin
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d1895cb60d
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[Spec] Extract move_accept_tokens_to_target_kvcache into spec_utils (#27764)
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2026-06-09 21:55:26 -07:00 |
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2495c02c2c
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[Refactor] Cuda Graph Runner/Backend Refactor (#23906)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-06-09 21:36:57 -07:00 |
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Mick
|
56f06278c6
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[diffusion] refactor: refactor realtime control state and adapters (#27698)
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2026-06-10 12:27:16 +08:00 |
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Baizhou Zhang
|
047e5df3b1
|
Revert "Share BCG output buffers across capture sizes" (#27758)
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2026-06-09 20:51:40 -07:00 |
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Lianmin Zheng
|
165331a200
|
Share BCG output buffers across capture sizes (#27659)
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2026-06-09 20:33:46 -07:00 |
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fatSheep
|
d21c31f681
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fix: forward update_mamba_state_after_mtp_verify in HybridAttnBackend (#25883)
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2026-06-09 20:06:50 -07:00 |
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huangtingwei
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f101b287ef
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[Unified Tree]fix compatibility with eagle key and l3 hicache (#27655)
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2026-06-10 10:54:45 +08:00 |
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sushil Dubey
|
5809bbe35d
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Mistral3 add tensor parallel support for diffusion text encoder (#25950)
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2026-06-10 09:43:21 +08:00 |
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Mick
|
af55025644
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[diffusion] refactor: refactor realtime and model-specific stage modules (#27697)
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2026-06-10 09:39:06 +08:00 |
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bcd9c5a903
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update pytorch-xpu to 2.12 (#27133)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: MingxuZh <109504044+MingxuZh@users.noreply.github.com>
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2026-06-10 09:25:30 +08:00 |
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Jianhong Zhang
|
77c4d53f19
|
[PD] Fix prefill bootstrap registration failure with --host 0.0.0.0 (#27608)
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2026-06-10 09:15:26 +08:00 |
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