 Liangsheng YinandAlex Nails
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b3c02cbce7
|
[perf] Collapse the DP attention scheduler sync to a single D2H copy (#34338)
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
|
2026-08-10 21:52:29 -07:00 |
|
Liangsheng Yin
|
585c3c6816
|
[Refactor] Split the FlashInfer autotune dummy-run flag from the LM-head policy (#34336)
|
2026-08-10 21:20:05 -07:00 |
|
EchO
|
a58fa0388e
|
[Fix] Correct W4AFP8 DeepEP scaling and mode-specific dtypes (#33669)
|
2026-08-11 11:21:42 +08:00 |
|
 forrestlandClaude Opus 5
|
704808ed27
|
[MiniMax-H3] SubBlock: training-free block-sparse attention for the DiT (#34148)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-11 11:11:11 +08:00 |
|
Zhiyao Jiang
|
dd20826e0a
|
[AMD] Preserve the AITER expert mask across torch_memory_saver pause/resume (#34220)
|
2026-08-10 19:59:15 -07:00 |
|
Baizhou Zhang
|
b498f46271
|
[CI] Add MegaMoE runner compatibility alias (#34326)
|
2026-08-10 19:47:38 -07:00 |
|
Mick
|
aeab1de1de
|
[diffusion] optimization: support cuda graph for Pi-0.5 prefix encoding (#34256)
|
2026-08-11 09:14:53 +08:00 |
|
cctry
|
df986c4d5e
|
Consolidate CUDA VMM allocation helpers (#34199)
|
2026-08-10 18:11:11 -07:00 |
|
Mick
|
ba5183fe10
|
[diffusion] UX: fix CI server warmup progress logging (#34301)
|
2026-08-11 09:09:32 +08:00 |
|
Mick
|
418975ba64
|
[EPD] feat: pipeline owner-only multimodal preprocessing (#34206)
|
2026-08-11 09:08:05 +08:00 |
|
 elvischenvandClaude Opus 5
|
03c942dfab
|
[Fix] Make wait_port_available actually wait timeout_s seconds (#33086)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-10 17:35:50 -07:00 |
|
milesial
|
d59c1ddf70
|
fix(dflash): account for DCP in draft KV pool sizing (#33912)
Signed-off-by: Alexandre Milesi <milesial@users.noreply.github.com>
|
2026-08-10 17:15:01 -07:00 |
|
 Khoa PhamandClaude Opus 5
|
0967885121
|
[DCP] Drop two per-layer launches from the MLA target-verify path (#34240)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-10 17:11:03 -07:00 |
|
 weireweireandweireweire
|
2d5009d130
|
[DSV4] Avoid host syncs in EAGLE prefill (#33662)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
|
2026-08-10 17:09:55 -07:00 |
|
Michael Gschwind
|
7c7326ccb3
|
Fix DeepSeek-V4/DeepSeek-V4-Pro DP-attention gather semantics (#31700)
|
2026-08-10 17:03:19 -07:00 |
|
Baizhou Zhang
|
56e8bb49b8
|
fix(ci): constrain NeMo Skills evaluator dependencies (#34322)
|
2026-08-10 16:56:46 -07:00 |
|
Liangsheng Yin
|
c30872fa00
|
[Fix] Read trace level via get_global_trace_level() in trace_async (#34325)
|
2026-08-10 16:46:54 -07:00 |
|
Mohammad Miadh Angkad
|
8c5d5f75bf
|
Fix DSV4 DSpark shared expert loading (#33312)
|
2026-08-11 07:36:50 +08:00 |
|
 Cheng WanandClaude Fable 5
|
ceeaec2078
|
[PD] Support --enable-unified-memory with PD disaggregation (kimi-linear MLA hybrid-Mamba) (#33362)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-10 16:07:58 -07:00 |
|
 Cheng WanandClaude Fable 5
|
8a7c8a72d6
|
Fix NaN logits from deterministic Triton extend on the unified memory pool (#33517)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-10 16:05:04 -07:00 |
|
 
|
0661eb1c50
|
plugins: don't directly set quant class (#34252)
Signed-off-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
|
2026-08-10 16:01:31 -07:00 |
|
Zhiyao Jiang
|
2c72323d90
|
[AMD] Fix AITER custom reduce-scatter CUDA-graph capture crash under torch_memory_saver (#34203)
|
2026-08-10 15:36:15 -07:00 |
|
Liangsheng Yin
|
c80a38edcd
|
[Fix] Pin cuda-tile to 1.6.0rc5 to unblock Python 3.10 x86_64 installs (#34321)
|
2026-08-10 15:09:47 -07:00 |
|
AMD-yanfeiwang
|
ca0f8a0f4c
|
perf(hisparse): fuse the DSv4 value and scale swap-in copy on ROCm (#33484)
|
2026-08-10 14:30:15 -07:00 |
|
QIN2DIM
|
166c6f7181
|
[Kernel] cutedsl_bf16_gemm: trailing cluster barrier for 2-CTA TGV kernel exit (#32907) (#32954)
|
2026-08-10 20:31:18 +00:00 |
|
AMD-yanfeiwang
|
1a8e4876b6
|
perf(hisparse): 128-bit non-temporal swap-in copy on ROCm (#33085)
|
2026-08-10 13:27:15 -07:00 |
|
Qiaolin Yu
|
733c05c887
|
[spec decoding] support inkling dspark (#31847)
|
2026-08-10 13:21:35 -07:00 |
|
 Lifan ShenandXinyuan Tong
|
a2161ce682
|
Support thinking budget for Inkling (#33146)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
|
2026-08-11 02:01:08 +08:00 |
|
Tan Trinh
|
955aab8db1
|
[DCP] Reuse partial output in natural-log LSE merge (#34213)
|
2026-08-10 10:45:40 -07:00 |
|
Cheng Wan
|
7738062294
|
[unified memory] Support DSPARK speculative decoding + fix two NaN root causes (page hand-out zeroing, CuTe int32 slot-stride wrap) (#33974)
|
2026-08-10 10:35:06 -07:00 |
|
Mick
|
ec9babe36c
|
[diffusion] fix: fix h3 rank-local fsdp qkv loading (#34294)
|
2026-08-10 23:59:00 +08:00 |
|
 
|
d07ac32d05
|
[diffusion] feat: support --served-model-name in sglang serve (#34228)
Co-authored-by: TobyMint <tobymint@users.noreply.github.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
|
2026-08-10 22:27:09 +08:00 |
|
 Xiaoyu ZhangandClaude Fable 5
|
f5f0c3ee7a
|
[diffusion] Z-Image single-GPU BCG: fix the replay crash and make output bit-exact vs eager (#34183) (#34210)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-10 22:18:32 +08:00 |
|
 
|
fd3036523a
|
[diffusion] Clean up shared bitexact gates, helpers, and stale naming (#34180)
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-10 22:14:09 +08:00 |
|
Mick
|
3e2a26708b
|
[diffusion] chore: expose architecture config at the dit runtime boundary (#34248)
|
2026-08-10 20:08:45 +08:00 |
|
Mick
|
8ba9385097
|
[diffusion] chore: optimize model weight loading (#34064)
|
2026-08-10 20:07:48 +08:00 |
|
 
|
14ffd447a4
|
[FEAT] Decouple multimodal global cache from Mooncake (#30392)
Co-authored-by: Yuang Chen <cya539102@antgroup.com>
Co-authored-by: Yuang Chen <1131578721@qq.com>
|
2026-08-10 19:23:19 +08:00 |
|
Mick
|
443b62db57
|
fix(vlm): stream-order cuda-ipc feature pool lifecycle and streamline multimodal transport module (#33949)
|
2026-08-10 18:47:19 +08:00 |
|
Thomas Wang
|
0977b22431
|
[AMD] Restore K3 MLA verify kernel path blocked by can_handle() guard (#34261)
|
2026-08-10 03:31:53 -07:00 |
|
Mick
|
955569a2dc
|
[diffusion] feat: expose cosmos3 policies through the Action API (#34243)
|
2026-08-10 18:16:20 +08:00 |
|
 YAMYandShangming Cai
|
c971d7ac9c
|
Refactor staging registration metadata fields (#33910)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
|
2026-08-10 17:53:32 +08:00 |
|
Jincong Chen
|
3c533acec6
|
[Hicache][2/2]Support Mamba branching in Unified Radix Cache with HiCache (#33639)
|
2026-08-10 17:16:42 +08:00 |
|
 
|
a76a167812
|
Fix/hisparse host backed max request length (#28753)
Co-authored-by: huangtingwei <141888744+huangtingwei9988@users.noreply.github.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
|
2026-08-10 16:58:13 +08:00 |
|
 Liangsheng YinandBrayden Zhong
|
b51bf9ec9e
|
[Spec] Budget the DFLASH draft KV pool from its own attention geometry (#34234)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
|
2026-08-10 01:28:49 -07:00 |
|
 MichaelandHAI
|
f2a4c4c847
|
[AMD] [CI] Enable 3 nested unit tests needing harness stub fixes (#31843)
Co-authored-by: HAI <hixiao@gmail.com>
|
2026-08-10 16:09:00 +08:00 |
|
Feng Su
|
fb3d1419fd
|
[tracing] sglang tracing v2: support exporting tracing data asynchronously (#30023)
|
2026-08-10 15:23:05 +08:00 |
|
 Yuwei AnandClaude Opus 5
|
06f32bab6b
|
[BCG][5/N] MLA Fully Support (#33661)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-09 23:52:14 -07:00 |
|
 Liangsheng YinandBrayden Zhong
|
aea78d1e73
|
[misc] Pass FP8 scales in FlashInfer SWA prefill, autotune fp8 on SM120, and tighten is_image_understandable_model (#34217)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
|
2026-08-09 23:45:11 -07:00 |
|
 Liangsheng YinandBrayden Zhong
|
d6a066131c
|
[Feature] Support NVFP4 token embedding in ModelOpt mixed-precision checkpoints (#34222)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
|
2026-08-09 23:37:54 -07:00 |
|
Chunan Zeng
|
e226bb711c
|
enable TRT-LLM for MiniMax M3 by preserving SwiGLU params (#33962)
|
2026-08-09 23:30:05 -07:00 |
|