 Liangsheng Yin
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007ef5e23a
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[mem_cache] Move req_pool_idx into ReqKvInfo (#37094)
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2026-08-30 14:46:21 -07:00 |
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Liangsheng Yin
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0438b16154
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[mem_cache] Move kv_committed_len into ReqKvInfo (#37078)
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2026-08-29 22:42:25 -07:00 |
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Liangsheng Yin
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24a3a63e6b
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[misc] Keep req.kv non-optional and key KV ownership on req_pool_idx (#36958)
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2026-08-28 23:47:42 -07:00 |
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ishandhananiandShangming Cai
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978244d671
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[P/D disagg] Decode-side radix cache for SWA hybrid models (unified radix tree) (#27770)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-08-21 09:25:06 +08:00 |
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Liangsheng Yin
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7ebaa98f81
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[Fix] Assert the page-aligned SWA evict floor on both PD decode prealloc paths (#35396)
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2026-08-18 15:48:55 -07:00 |
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Cheng WanandClaude Fable 5
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ceeaec2078
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[PD] Support --enable-unified-memory with PD disaggregation (kimi-linear MLA hybrid-Mamba) (#33362)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-10 16:07:58 -07:00 |
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huangtingweiandjackyYang6
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3953788596
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[HiSparse]Fix DeepSeek V4 HiSparse PD Transfers with Separate Host and Device KV Indices (#31901)
Co-authored-by: jackyYang6 <82102811+jackyYang6@users.noreply.github.com>
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2026-08-03 20:35:04 +08:00 |
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fzyzcjy
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1afab30577
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Fix bookkeeping fields not encapsulated with real allocations in normal alloc, PD pre-alloc, DFlash and EAGLE (#29432)
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2026-07-15 14:52:21 +08:00 |
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Junjie CaoandZhangheng
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1d8e3c248b
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Fix DSV4 HiSparse SWA tail allocation forwarding (#30408)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-07-10 15:27:02 +08:00 |
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