 Xiaoyu ZhangandMick Qian
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4d23a4fa6d
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[Test] Consolidate test cleanup and CI taxonomy (net -11.4K lines) (#37436)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
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2026-09-07 15:13:59 +08:00 |
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sglang-botandsglang-bot
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6252993afe
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chore: update CI test est_time values (#38238)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
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2026-09-06 17:49:41 -07:00 |
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junduandMa Mingfei
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8770c1db1f
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[CPU][CI]: rename Xeon CPU CI suites to stage-*-intel (#37395)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-09-04 10:08:41 +08:00 |
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Zhanghengand晟海
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abed680320
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[Unified Cache][5/N]: Integrate external linker mode end to end (#37381)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
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2026-09-04 02:02:58 +08:00 |
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Alex NailsandAlison Shao
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28262c20df
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[CI][RFC] Replace black-jupyter with ruff-format (#37210)
Co-authored-by: Alison Shao <a.shao@wustl.edu>
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2026-09-02 19:46:08 -07:00 |
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Alison Shao
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db1eb48651
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[CI] Graceful teardown for the PD and HiSparse server fixtures (#37485)
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2026-09-02 17:22:18 -07:00 |
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9cf157c252
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[Radix Cache] Add Rust TreeCore backend with shared parity tests (#32710)
Co-authored-by: alphabetc1 <2508695655@qq.com>
Co-authored-by: ispobock <ispobaoke@gmail.com>
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2026-09-01 00:26:20 +08:00 |
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Aurick Qiao
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9a9e167179
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[Bugfix] Fix full prefill CUDA graph padding and EAGLE capture (#35588)
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2026-08-30 21:30:24 -07:00 |
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Alison Shao
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a126a5fa31
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[CI] Graceful teardown for the radix_cache server fixtures (#36605)
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2026-08-27 16:36:04 +08:00 |
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Jialin Ouyang
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bede6bc37c
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Fix unified HiCache PP test import (#36454)
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2026-08-26 15:35:18 +08:00 |
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Zhangheng
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bec6248272
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[Unified Cache]: add glm5.2 per commit ci (#36281)
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2026-08-26 10:04:19 +08:00 |
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829138a31e
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[HiCache] Fix PP inconsistency with HiCache L3 (#22607) (#27010)
Co-authored-by: ybyang <ybyang7@iflytek.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: shangmingc <csmthu@gmail.com>
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
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2026-08-25 20:49:57 +08:00 |
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Baizhou Zhang
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833be86c15
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[CP V1 Deprecation 1/5] Migrate tests to strategy-based prefill CP (#36222)
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2026-08-24 20:15:34 -07:00 |
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514b997e6c
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Register CPU CI for 17 e2e tests and partition xeon base-c suite (#35227)
Co-authored-by: Zhang, Mingxu <mingxu.zhang@intel.com>
Co-authored-by: MingxuZh <109504044+MingxuZh@users.noreply.github.com>
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-24 10:49:38 +08:00 |
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ishandhananiandShangming Cai
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978244d671
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[P/D disagg] Decode-side radix cache for SWA hybrid models (unified radix tree) (#27770)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-08-21 09:25:06 +08:00 |
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Ke Bao
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d528192bf9
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Skip inkling sheared bias under batch invariance (#35161)
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2026-08-18 12:22:58 +08:00 |
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Ke Bao
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6e8a4abb57
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Add bit-exact class for MTP (#35143)
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2026-08-17 19:51:39 +08:00 |
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Ke Bao
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ace7314173
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Add bit-exact guard for extra_buffer_lazy (#35030)
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2026-08-16 23:34:46 +08:00 |
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Ke Bao
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dd458f3212
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Fix dsv4 kl test timeout (#34963)
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2026-08-16 01:57:40 +08:00 |
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Ke Bao
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5a5c3d309b
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Drop the mmlu case from the unified radix cache kit (#34667)
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2026-08-13 15:16:05 +08:00 |
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Ke Bao
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5efe9b104d
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Record both architectures in the bit-exact guard docstrings (#34656)
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2026-08-13 10:55:35 +08:00 |
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Ke Bao
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3974b00359
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Add bit-exact unified radix cache KL test for hybrid SWA + mamba (#34607)
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2026-08-13 02:15:36 +08:00 |
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huangtingweiandHanming Lu
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8f3d3a31f4
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[HiCache] Fix Mamba track-boundary bookkeeping under overlap scheduling (#29792)
Co-authored-by: Hanming Lu <hanminglu@meta.com>
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2026-08-12 00:36:48 +08:00 |
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Mohammad Miadh Angkad
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77b8315b84
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[CI] Fix GSM8K floating-point tolerance boundary (#34272)
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2026-08-10 16:27:11 -07:00 |
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Liangsheng Yin
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7c90840bad
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[CI] Key scheduled CUDA suites by runner_config instead of hand-written jobs (#34186)
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2026-08-09 16:44:53 -07:00 |
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Liangsheng YinandBaizhou Zhang
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f6a6f5bf1e
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[CI] Trim redundant nightly test registrations (#34070)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2026-08-08 01:42:46 -07:00 |
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8e11feb68e
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[HiCache] Support packed and sidecar draft caches for MTP/EAGLE/DSpark (#30393)
Co-authored-by: hjzhang <hjzhang89.gmail.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
Co-authored-by: shuwenn <47200617+alphabetc1@users.noreply.github.com>
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2026-08-06 14:31:11 +08:00 |
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Yuwei AnandClaude Opus 5
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1a3bea77f2
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[Feat] DCP + HiCache L2 Support (ported from kimi-k3) (#33112)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-02 23:35:27 +08:00 |
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Alison Shao
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43be25b2b7
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[CI] Graceful teardown for kv_canary and EAGLE spec fixtures (#32829)
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2026-08-02 01:09:59 -07:00 |
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Sam ShleiferandClaude Fable 5
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62dfaaa0e0
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[Nemotron] Fix decode track-save reading the stale tail of the CUDA-graph track buffer (#32555)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-07-29 19:03:44 -07:00 |
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YAMY
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c18919f8f3
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[Mamba] Add a per-path cap for cached states (#31230)
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2026-07-23 17:58:36 +08:00 |
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3217b7e3ce
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fix(hicache): support staged write-back for asymmetric MHA (#30981)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-07-22 09:58:49 +08:00 |
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Alison Shao
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696e8f80d1
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[CI] Graceful teardown in kl_mamba hicache tests to release pinned host pool (#31871)
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2026-07-21 02:09:26 -07:00 |
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Zhangheng
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0299393758
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[UnifiedTree]: Sync mamba int8 checkpoint (#30626)
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2026-07-10 23:46:38 +08:00 |
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Xiaoyu ZhangandClaude Opus 4.8
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1da7d3a50b
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[MoE] Retire the AOT moe_fused_gate / kimi_k2_moe_fused_gate gate kernels (#26771) (#29997)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-07-07 13:53:17 +08:00 |
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Xiaoyu Zhang
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b276a9acee
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chore: cleanup garbage code (#29770)
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2026-07-02 16:14:01 +08:00 |
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zhangxiaolei
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56f22cd520
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Optimize C128 state pool allocation using request state pool (#28612)
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2026-06-30 19:11:29 -07:00 |
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Baizhou Zhang
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cc238270b1
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Update GLM tests to 5.2 and delete redundant tests (#29686)
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2026-06-29 23:04:26 -07:00 |
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Liangsheng Yin
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909123ddb8
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[misc] Use --cuda-graph-max-bs-decode in tests, examples, and docs (#29591)
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2026-06-28 18:38:28 -07:00 |
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c1b5c7e499
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Fix DeepSeek V4 PP HiCache SWA allocation and layer mapping (#29106)
Co-authored-by: hjzhang <zhanghjzzz@qq.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-06-27 22:19:14 +08:00 |
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Yuan Luoandluoyuan.luo
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c0198fc277
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[CI] Refactor int checkpoint tests style (#28813)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-06-22 14:59:06 -07:00 |
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Zhangheng
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70883cb1b0
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[UnifiedTree]: Rollback mamba hicache test to direct io backend (#28904)
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2026-06-22 23:48:48 +08:00 |
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cctryandcctry
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0c065671c9
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[Spec] Redo: split init_backends; account draft weights in --mem-fraction-static (#28855)
Co-authored-by: cctry <cctry@fb.com>
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2026-06-21 20:45:16 -07:00 |
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Vladislav Nosivskoy
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2ad9a5b576
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[UnifiedTree] Use dense model for HiCache+CP KL tests (#28726)
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2026-06-20 00:18:01 +08:00 |
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huangtingweiandhzh0425
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6b7ecca663
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[HiCache]Support hybrid pool staged H2D kernel (#28434)
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-06-19 09:48:03 +08:00 |
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Zhanghengandispobock
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867707f1f2
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[UnifiedTree]: move some kl test from base to extra stage (#28627)
Co-authored-by: ispobock <ispobaoke@gmail.com>
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2026-06-18 01:39:46 -07:00 |
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Vladislav NosivskoyandZhangheng
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b7ae7149e8
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[HiCache] Fix SWA L3 cache miss due to a prefetch/hit len mismatch (#27291)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-06-18 14:55:00 +08:00 |
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Yuan Luoandluoyuan.luo
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3340f4e3da
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[GDN][KDA][mem_cache] int8 checkpoint pool for the linear-attn prefix cache (#28185)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-06-17 20:41:46 -07:00 |
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Michael
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a2aa51c818
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[AMD] register 4 2-gpu tests to stage-b-test-2-gpu-large-amd (#28344)
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2026-06-16 21:58:34 -07:00 |
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Chao Shi
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5fb4e2d02e
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[UnifiedTree] Use Qwen3-32B in unified radix pp kl tests and set KL threshold to 0.005 (#27931)
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2026-06-14 13:15:35 +08:00 |
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