Commit Graph
116 Commits
Author SHA1 Message Date
sglang-botandsglang-bot 6252993afe chore: update CI test est_time values (#38238)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
2026-09-06 17:49:41 -07:00
55bf3380e0 Support Hy4-preview (#36805)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: alphabetc1 <2508695655@qq.com>
2026-09-04 18:03:49 -07:00
junduandMa Mingfei 8770c1db1f [CPU][CI]: rename Xeon CPU CI suites to stage-*-intel (#37395)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-09-04 10:08:41 +08:00
Alex NailsandAlison Shao 28262c20df [CI][RFC] Replace black-jupyter with ruff-format (#37210)
Co-authored-by: Alison Shao <a.shao@wustl.edu>
2026-09-02 19:46:08 -07:00
YAMY 9a03bc2dc3 [CI] Fix stale GPU capability test patches (#37148) 2026-08-30 10:12:32 -07:00
Liangsheng Yin 45c85c198b [CI] Lower the AWQ Marlin MMLU threshold to 0.80 (#36570) 2026-08-26 14:43:20 -07:00
Colin Z bc7e3ba66c [AMD][Quantization] Online MXFP4 quantization 4/N - NVFP4 to MXFP4 Online Requantization on AMD GPUs (#29328) 2026-08-14 21:59:39 -07:00
Liangsheng Yin 50cc1aa241 [CI] Route mmlu and GB300 MMMU-Pro evals through sgl-eval (#34477) 2026-08-12 19:33:21 -07:00
Liangsheng YinandBrayden Zhong d6a066131c [Feature] Support NVFP4 token embedding in ModelOpt mixed-precision checkpoints (#34222)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
2026-08-09 23:37:54 -07:00
11d03eaeef runtime: Add flashinfer rmsnorm + quant fusion support SM90, SM100, SM120- #32994 (#33471)
Signed-off-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-09 20:15:03 +08:00
Liangsheng YinandBaizhou Zhang f6a6f5bf1e [CI] Trim redundant nightly test registrations (#34070)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
2026-08-08 01:42:46 -07:00
Baizhou Zhang 0e584529f5 [CI] Remove profiling from nightly tests (#33832) 2026-08-06 01:16:08 -07:00
Liangsheng Yin 3869fe556f [CI] Collapse the EAGLE launch matrix and the scoring engine boots on the per-commit runners (#33756) 2026-08-05 16:43:19 -07:00
Liangsheng Yin 198a3bc29b [Test] Route GEMM backend UTs through real layer modules and weight loaders (#33615) 2026-08-04 20:53:26 -07:00
Liangsheng Yin 76dc89f5aa [Test] Replace NVFP4 MoE runner backend e2e matrix with a layer-level unit test (#33611) 2026-08-04 16:03:29 -07:00
Liangsheng Yin a0b3f1dde6 [Test] Replace GEMM backend e2e matrices with layer-level unit tests (#33596) 2026-08-04 15:50:41 -07:00
Baizhou Zhang eb31a53338 Revert "Add flashinfer rmsnorm + quant fusion support SM90, SM100, SM120" (#33455) 2026-08-03 19:03:56 -07:00
3960983753 Add flashinfer rmsnorm + quant fusion support SM90, SM100, SM120 (#32994)
Signed-off-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-04 08:37:42 +08:00
sonle5 1685d29f21 [AMD] Fix DeepSeek-V4 fused-RMS FP8 scale metadata on gfx950 (#31727) 2026-08-02 00:06:09 -07:00
Rain Jiang 4af8ddb576 support rust sglang server (#29799) 2026-07-31 11:56:31 -07:00
Mohammad Miadh Angkad d6690de961 [CI] Fix Marlin MoE test ServerArgs initialization (#32049) 2026-07-22 20:16:43 +08:00
dcd9014f15 [AMD][MXFP4] Reland "Online MXFP4 quantization 2/N - FP8 to MXFP4 requantization on AMD GPUs" (#28291)
Co-authored-by: Bowen Bao <bowenbao@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
2026-07-21 02:50:23 -07:00
Mohammad Miadh Angkad a82ead53bd Make Q contiguous before TRT-LLM MHA decode (#31667) 2026-07-20 15:21:00 -07:00
Xiaoyu Zhang 829e9ce9d5 Lower AutoRound quantization MMLU threshold (#31748) 2026-07-20 13:40:48 +08:00
Baizhou Zhang 38b29dcd6c Fix SM120 NVFP4 KV cache test OOM (#31653) 2026-07-18 00:53:47 -07:00
Sam (Kesen Li) ec6a3163b7 [Feature] Add FP4 KV Cache Design and support SM120 GPUs (#21601) 2026-07-17 14:49:43 -07:00
7431f35fd8 Delete CUTLASS FP8 blockwise for SM90 and SM100, move SM120 to JIT and add SwapAB (#30438)
Co-authored-by: Brayden Zhong <brayden.zhong@radixark.ai>
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
Co-authored-by: root <root@sgl-b300-inference.datacrunch.io>
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
2026-07-14 09:31:32 +08:00
Xiaoyu ZhangandClaude Fable 5 874fc07d9b [Kernel] Migrate scattered quantization kernels to sglang.kernels (RFC #29630, Phase 2.5, 1/7) (#30784)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-13 16:17:01 +08:00
7bc343470f [Spec] DFlash: support pure-MLA targets with an fp8 KV cache (Kimi-K2.x-NVFP4) (#29218)
Co-authored-by: Hao Phan <htphan@nvidia.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
2026-07-07 19:52:14 -07:00
Yuwei An 0543246184 Enable Breakable Cuda Graph as Default (#29458) 2026-07-01 22:04:44 -07:00
Michael 8361561c24 [AMD] Fix int8 per-token quant Triton portability + register test for AMD nightly CI (#29694) 2026-07-01 12:56:33 -07:00
cfc0a0e0e0 Add Intel Quantization Support in SGLang (#18139)
Signed-off-by: Mengni Wang <mengni.wang@intel.com>
Signed-off-by: WeiweiZhang1 <weiwei1.zhang@intel.com>
Co-authored-by: Peng Zhang <aniz1905@gmail.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: Weiwei <weiwei1.zhang@intel.com>
2026-06-26 09:54:35 +08:00
jundu e04ed05193 [CI] reduce CPU CI scope with base-c suite (#28623) 2026-06-24 16:18:06 +08:00
Michael 5d1949152d [AMD] ci: add extra-a 1-gpu-large tier (fp8kv-triton, streaming-session, spec-standalone) (#28458) 2026-06-17 23:31:32 -07:00
Qiaolin Yu 2ad00faae1 [ci] add kimi nvfp4 nightly tests (#28467) 2026-06-16 16:49:51 -07:00
Lianmin Zheng f18d38d040 Revert "[AMD][Quantization] Online MXFP4 quantization 2/N - FP8 to MXFP4 requantization on AMD GPUs" (#28213) 2026-06-14 13:34:06 -07:00
3f4a338212 [AMD][Quantization] Online MXFP4 quantization 2/N - FP8 to MXFP4 requantization on AMD GPUs (#18182)
Co-authored-by: Bowen Bao <bowenbao@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
2026-06-13 16:08:19 -07:00
Yuan Luoandluoyuan.luo c80d8fe78a [Perf] Skip per-call mat_a/scales_a padding in cutlass FP8 blockwise GEMM (#27896)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2026-06-12 12:01:53 -04:00
2495c02c2c [Refactor] Cuda Graph Runner/Backend Refactor (#23906)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
2026-06-09 21:36:57 -07:00
293816ab14 [AMD][MXFP4] Online MXFP4 quantization 1/N - dense and MOE models w. original BF16 weight (#18005)
Co-authored-by: Bowen Bao <bowenbao@amd.com>
Co-authored-by: Colin Zeng <Colin.Zeng@amd.com>
2026-06-03 12:55:24 -07:00
Liangsheng Yin ec78fa6518 test/registered: cleanup pure model e2e tests (moves, splits, dedup, kit) (#26610) 2026-05-28 15:41:46 -07:00
MingxuZh 21ba329dac [Xeon] CPU CI enhancement for Intel Xeon platforms (#24649) 2026-05-28 10:49:04 +08:00
Ziang Li 2b1e53c98d [RL] Fix FP8 skip matching for trailing-dot prefixes (#26287) 2026-05-26 20:30:08 +00:00
Cheng WanandClaude Sonnet 4.6 8131641bc6 [Refactor] Rename NSA → DSA: user-facing aliases, file/class/import rename (#25821)
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
2026-05-20 00:18:04 -07:00
Ratish P fab097d66d [Gemma4]: Fix FP8 Triton scale layout (#25286) 2026-05-19 14:00:23 -07:00
Liangsheng Yin b7d62bd724 [CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420) 2026-05-15 18:26:55 -07:00
ba214ef3d3 ci: tag-gated nightly migration — foundation + 40 whole-file moves (#24725)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
2026-05-14 16:11:15 -07:00
Alison Shao 1e308aec66 ci: B200 conditional split + LPT_SLOP removal (stage-c partition 8→3) (#25203) 2026-05-13 18:40:45 -07:00
Liangsheng Yin 22d3f3996c ci: decouple stage and runner for cuda registry (#25197) 2026-05-13 17:28:21 -07:00
Brayden Zhongandb8zhong 8f33bee31b Reland Cute-DSL FP4 dense GEMM (#23590)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
2026-05-09 02:20:58 -07:00