3 Commits

Include renames

Author	SHA1	Message	Date
junduandMa Mingfei	8770c1db1f	[CPU][CI]: rename Xeon CPU CI suites to stage-*-intel (#37395) ... Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>	2026-09-04 10:08:41 +08:00
5 people	514b997e6c	Register CPU CI for 17 e2e tests and partition xeon base-c suite (#35227) ... Co-authored-by: Zhang, Mingxu <mingxu.zhang@intel.com> Co-authored-by: MingxuZh <109504044+MingxuZh@users.noreply.github.com> Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> Co-authored-by: Claude <noreply@anthropic.com>	2026-08-24 10:49:38 +08:00
4 people	fad376d3ee	[CPU][QUANT] add amx cpu support for auto-round (#29593) ... Signed-off-by: WeiweiZhang1 <weiwei1.zhang@intel.com> Signed-off-by: sys-lpot-val <sys_lpot_val@intel.com> Co-authored-by: sys-lpot-val <sys_lpot_val@intel.com> Co-authored-by: Weiwei Zhang <WeiweiZhang1@users.noreply.github.com> Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>	2026-08-13 15:50:59 +08:00