 Khoa PhamandClaude Fable 5.1
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0d08668821
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[Cookbook] Kimi-K3: keep DCP under HiCache L1+L2 with DSPARK (#39190)
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
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2026-09-11 23:14:24 -07:00 |
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YAMY
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55e5e21c88
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[Qwen3.8-Next] Add PD state transfer for Flash Next (#36651)
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2026-09-11 22:31:45 -07:00 |
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Ziang Li
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dbd4302bbb
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Keep NVFP4 blockscale swizzle padding on the input device (#39141)
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2026-09-11 22:18:02 -07:00 |
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Aurick Qiao
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c389dd0863
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Fix RunAI object-storage checkpoint index filtering (#38988)
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2026-09-12 12:25:57 +08:00 |
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iridiumine
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a984c78330
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[NPU] Support DFlash speculative decoding for MiMo-V2.5-Pro (mxfp4) (#37565)
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2026-09-12 11:59:23 +08:00 |
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Baizhou Zhang
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9c365e97b1
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[CI] Fix DeepGEMM sanitizer setup and Blackwell test timeouts (#39163)
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2026-09-11 20:54:52 -07:00 |
|
  
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ff1ce11348
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[diffusion] model: support VDN-H3 with a hybrid_window_attn_h3 backend (#37903)
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Haocheng Xi <xihc@berkeley.edu>
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-09-12 11:36:32 +08:00 |
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 FrancisandQiaolin-Yu
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e91c948057
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feat: support TP>1 Domino rollout for DFlash V2 (#37069)
Co-authored-by: Qiaolin-Yu <liin1211@outlook.com>
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2026-09-11 18:51:11 -07:00 |
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Vignesh Sethuraman
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0d1bea77da
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[AMD] Allow aiter attention backend for Gemma-4 (#38758)
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2026-09-11 18:48:26 -07:00 |
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Vignesh Sethuraman
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e1d364dd1f
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[AMD] aiter: route head_dim>256 prefill through Triton unified_attention (#38757)
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2026-09-11 18:40:11 -07:00 |
|
   
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b805cc5014
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[Bugfix] Track DFlash Mamba state at checkpoint boundaries (#37818)
Co-authored-by: lvweiv <vwei.lv@gmail.com>
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2026-09-11 18:38:09 -07:00 |
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Baizhou Zhang
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29cc9d2dc9
|
[CI] Install elfutils headers for DeepGEMM wheel builds (#39152)
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2026-09-11 17:29:40 -07:00 |
|
 
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a207786205
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[PD] Transfer the DCP-replicated DSPARK draft KV in DCP1->DCP-N relayouts (#37709)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-09-11 17:15:18 -07:00 |
|
 
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7d9c57da6e
|
[Session] Fix session idle timeout after rejected requests (#39035)
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
Co-authored-by: Manik Singhal <3400497+Manikvsin@users.noreply.github.com>
|
2026-09-11 16:59:43 -07:00 |
|
Kevin Mi
|
5f3606c7b2
|
[Cookbook][AMD] Kimi-K3 MI350X/MI355X: pin a ROCm image with the DSPARK graph-capture fix, add measured cell numbers (#39029)
|
2026-09-11 16:10:44 -07:00 |
|
Xinyu Kang
|
6671cfc775
|
[AMD] Fix weight checking for AITER-shuffled block FP8 weights (#34330)
|
2026-09-11 15:49:56 -07:00 |
|
YAMY
|
f963d7a27c
|
fix(qsa): make the paged sparse-decode gather memory-safe (zero-fill scratch, int64 offsets, dequant FP8 on gather) (#38851)
|
2026-09-11 15:47:25 -07:00 |
|
Yanbin Jiang
|
ec30f19e4a
|
[LoRA] Support MoE in full and breakable prefill CUDA graphs (#38578)
|
2026-09-11 14:40:02 -07:00 |
|
Hanming Lu
|
45715e7f20
|
[Fix] Disable NCCL graph buffer registration for the TP LM-head all-to-all (pure-DP decode hang under request bursts) (#38936)
|
2026-09-11 13:10:48 -07:00 |
|
Bingxu Chen
|
a338a9a01c
|
[AMD][CI] Skip failing Wave test and relax multi-LoRA output check (#38585)
|
2026-09-11 12:25:20 -07:00 |
|
  
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df6424967a
|
[docs] Add the NVIDIA NVFP4 export to the Qwen3.8-27B cookbook (#38611)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Jiminator <jimmysh341@gmail.com>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
|
2026-09-11 11:58:30 -07:00 |
|
Zhang, Jiejing
|
d7c284b894
|
[AMD] Use the triton DSA backend for GLM-5.2 MXFP4 on MI355X (#39106)
|
2026-09-11 11:48:50 -07:00 |
|
 billishyahaoandHAI
|
833bce9df5
|
[AMD][DCP 1/N] add dcp support for aiter backend (#34432)
Co-authored-by: HAI <hixiao@gmail.com>
|
2026-09-11 10:35:51 -07:00 |
|
Jeremy Zhang
|
f69d6fc28a
|
[OpenAI] Propagate PD routing metadata through /v1/responses (#35503)
|
2026-09-12 01:33:38 +08:00 |
|
Vignesh Sethuraman
|
ddf02a4f58
|
[AMD] aiter: resolve SWA KV pool for draft workers + guard paged decode (#38756)
|
2026-09-11 10:13:48 -07:00 |
|
 Mohammad Miadh AngkadandMohammad Angkad
|
4309c7ce19
|
Fix stale DSV4 indexer metadata names in the TopK v2 dispatch test (#39101)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-11 08:31:42 -07:00 |
|
Xiaoyu Zhang
|
d6b5dca90c
|
[Diffusion] Optimize SANA-WM convolution post-processing and streaming GDN (#38529)
|
2026-09-11 23:30:17 +08:00 |
|
Shangming Cai
|
2c10f87991
|
[PD] Read nixl TransferInfo.is_dummy as a field in unit tests (#39100)
|
2026-09-11 23:20:02 +08:00 |
|
 
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2a46cf2ca0
|
[PD] Share the prefill->decode failure notification across backends (#36612)
Co-authored-by: inkcherry <mingzhi.liu@amd.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
|
2026-09-11 23:16:17 +08:00 |
|
 MickandMick Qian
|
e016de462c
|
[diffusion] CI: expose nightly server telemetry coverage (#38782)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
|
2026-09-11 23:07:37 +08:00 |
|
Xiaoyu Zhang
|
7f09fbcd25
|
[Diffusion] Preserve BF16 rounding in Hopper LTX QKNorm and RoPE fusion (#38533)
|
2026-09-11 23:02:54 +08:00 |
|
 MickandMick Qian
|
dd67a42634
|
[diffusion] UX: quiet request-path cache diagnostics (#38783)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
|
2026-09-11 22:45:21 +08:00 |
|
  
|
593c7a900d
|
Add granite_thinking_parser reasoning parser for Granite 4.2 (#38693)
Signed-off-by: Yousaf Shah <yousaf.shah@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
|
2026-09-11 07:18:35 -07:00 |
|
  
|
335f6aab27
|
[DSV4] Support raw-index output in TopK v2 (#33672)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
|
2026-09-11 07:17:36 -07:00 |
|
 MickandClaude Opus 5
|
ab9750fb35
|
[diffusion] optimization: pin layerwise host stores in place at their exact size (#39021)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-09-11 22:04:40 +08:00 |
|
Xinyuan Tong
|
e8a36d339c
|
Auto-detect GLM-5.3 chat templates as glm45/glm47 parsers (#38297)
|
2026-09-11 09:02:44 -04:00 |
|
 MickandMick Qian
|
358c163250
|
[diffusion] fix: recover ipc jit initialization after interrupted builds (#39034)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
|
2026-09-11 19:34:09 +08:00 |
|
James
|
165d8dd177
|
[NPU][Hicache] Add Ascend Memcache Hicache L3 storage backend (#38827)
|
2026-09-11 18:54:00 +08:00 |
|
Liwansi
|
747734dce4
|
[NPU]glm5.2 fp8 memory opt (#38807)
|
2026-09-11 18:48:45 +08:00 |
|
Shangming Cai
|
a4ff5634b8
|
[CI] Add CI permissions for PP contributor stepinto (#39077)
|
2026-09-11 18:04:57 +08:00 |
|
Vincent Gao
|
8e7deb329e
|
[Router] Preserve global cache affinity with bucket routing (#38814)
Signed-off-by: Vincent Gao <vincentbo@linux.alibaba.com>
|
2026-09-11 17:41:27 +08:00 |
|
  
|
822e73ccdd
|
[Unified Cache][AMD] Support DeepSeek-V4 unified KV in direct external linkers (#38269)
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
Co-authored-by: TianDi101 <tiandi920722@gmail.com>
|
2026-09-11 01:49:29 -07:00 |
|
Jensen
|
0bae67648a
|
[NPU] Change npu.Dockerfile working directory to /sgl-workspace (#38968)
|
2026-09-11 11:30:07 +03:00 |
|
 Mohammad Miadh AngkadandMohammad Angkad
|
ad5af539cd
|
[CI] Trim DSV4 trtllm B200 tests (#39013)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-11 01:04:16 -07:00 |
|
Liangsheng Yin
|
17fa5ad327
|
[Refactor] Generalize attention graph variants in the decode runner (#38993)
|
2026-09-11 00:45:58 -07:00 |
|
 YC Yen-Ching TsengandChen
|
f618022b73
|
[AMD][CI] Temporarily pause MI355X disaggregated nightly (#39044)
Co-authored-by: Chen <bingxche@amd.com>
|
2026-09-11 15:19:24 +08:00 |
|
AMD-yanfeiwang
|
69aa46b2fa
|
[ROCm] Raise HiCache JIT block quota for mapped-host throughput (#39036)
|
2026-09-11 00:12:24 -07:00 |
|
Shuwen Wang
|
a713349faf
|
[HiCache] fix: preserve SWA host lock boundaries across splits (#38835)
|
2026-09-11 14:58:26 +08:00 |
|
Vignesh Sethuraman
|
76ef679cb1
|
[AMD] aiter: fail loudly on cross-layer KV sharing in target_verify (#38755)
|
2026-09-10 23:37:03 -07:00 |
|
Bingxu Chen
|
2465ee3948
|
[AMD] Fix DeepSeek block-FP8 loading on gfx94x (#38446)
Signed-off-by: Bingxu Chen <bingxche@amd.com>
|
2026-09-10 23:00:29 -07:00 |
|