 Zheng Luo
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435ea41cf0
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Delegate ModelExpress loading to package (#24723)
Signed-off-by: Zheng Luo <zheluo@nvidia.com>
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2026-05-16 11:16:44 -07:00 |
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Zhangheng
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0be539024f
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[BugFix]: Fix DeepSeek V4 HiCache layer count logic (#25477)
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2026-05-16 23:50:01 +08:00 |
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Xiaoyu ZhangandCodex
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2fc217df4d
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[codex] Split diffusion quant CI coverage (#24599)
Co-authored-by: Codex <codex@example.com>
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2026-05-16 22:05:02 +08:00 |
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Chi McIsaac
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596b45b373
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[diffusion] fix: change default qwen-image vae precision to bf16 (#25411)
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2026-05-16 21:55:31 +08:00 |
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Xiaoyu Zhang
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93bacc25ed
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[codex] Optimize LTX2 split rotary kernel (#24732)
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2026-05-16 20:58:38 +08:00 |
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ybyang
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0f50ed86c9
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fix(pd): fix kv pools without end_layer (#25476)
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2026-05-16 19:49:26 +08:00 |
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Qiaolin Yu
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2f81718773
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[attn backend] avoid initing parent class's workspace buffer (#25321)
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2026-05-16 03:30:33 -07:00 |
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Liangsheng Yin
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aec4022e58
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[Spec] Clean up draft-window-size handling; extract spec arg setup to arg_groups (#25424)
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2026-05-16 03:23:48 -07:00 |
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Liangsheng Yin
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d1eb472a7a
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fix(overlap): skip empty future interval for dp attention idle ranks (#25473)
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2026-05-16 02:08:01 -07:00 |
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Mick
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7f37ffae9d
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[diffusion] CI: fix nightly CI (#25241)
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2026-05-16 16:55:30 +08:00 |
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Yuhao Yang
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b2c6db0cc4
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[MoE] Decouple Mega MoE from DeepEP backend (#25406)
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2026-05-16 00:18:43 -07:00 |
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162540e0a8
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feat: add Pipeline Parallelism (PP) and PD support for DeepSeek-V4 (#24704)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: xuyongfei <xuyongfei.xyf@antgroup.com>
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2026-05-15 22:54:32 -07:00 |
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JoeLee314andJoeLee314
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bda01d2435
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[Disagg] Fix MegaMoE topk_ids dtype mismatch and FakeKVManager missing kv_args (#25380)
Co-authored-by: JoeLee314 <liqichao@baidu.com>
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2026-05-15 22:46:44 -07:00 |
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Jimmy Shong
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daade9cc00
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[Fix] Probe speculative draft config via sglang get_config (#25428)
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2026-05-15 22:01:44 -07:00 |
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Mick
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416fdbbb3d
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[diffusion] feat: generalize layerwise offload residency mixin to all components (#24593)
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2026-05-16 11:44:46 +08:00 |
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Sam Shleifer
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ce2506e1c6
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Deprecate record_nolora_graph dual MoE CUDA graph capture (#24314)
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2026-05-15 19:20:58 -07:00 |
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fzyzcjy
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688b679af2
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Convert discarded-value ternary to a plain if statement (#25449)
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2026-05-16 09:35:36 +08:00 |
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Liangsheng Yin
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b7d62bd724
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[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)
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2026-05-15 18:26:55 -07:00 |
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fzyzcjy
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d0c38329b2
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Inline the trivial _build_model_config wrapper (#25448)
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2026-05-16 09:25:48 +08:00 |
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fzyzcjy
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4190328767
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Replace defensive getattr in pool_configurator with direct access (#25447)
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2026-05-16 09:25:14 +08:00 |
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fzyzcjy
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48f85d464f
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Fix V2 trace filename collisions when DP/PP/EP enabled (#25446)
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2026-05-16 09:24:39 +08:00 |
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fzyzcjy
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b3059e2d1e
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Inject ParallelState into ProfilerV2 (#25445)
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2026-05-16 09:24:15 +08:00 |
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fzyzcjy
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43797cc804
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Bundle Scheduler rank/size fields into a frozen ParallelState (#25444)
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2026-05-16 09:23:51 +08:00 |
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fzyzcjy
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fa8b7c9647
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Lift forward_ct/cur_batch and use direct access in watchdog (#25442)
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2026-05-16 09:22:41 +08:00 |
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fzyzcjy
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72eb231d28
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Annotate dead max_running_requests_under_SLO (#25441)
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2026-05-16 09:22:13 +08:00 |
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fzyzcjy
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c8e5cf5768
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Fix LoRA pool not appearing in /v1/loads (#25440)
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2026-05-16 09:21:27 +08:00 |
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fzyzcjy
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5c440cdc41
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Lift running_batch / running_mbs access — direct + PP-explicit (#25439)
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2026-05-16 09:21:00 +08:00 |
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fzyzcjy
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80c3ce3204
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Convert forward_pass_device_timer to None-init (#25438)
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2026-05-16 09:20:31 +08:00 |
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Lianmin ZhengandHanming Lu
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21e420b4c2
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[Test] Set default temperature to 0.0 in kl_test_utils (#25429)
Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com>
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2026-05-15 18:20:10 -07:00 |
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fzyzcjy
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40429248c8
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Drop dead hasattr guards (hisparse_coordinator, metrics_collector) (#25437)
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2026-05-16 09:19:56 +08:00 |
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fzyzcjy
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0071033ff6
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Cache _linear_attn_registry_cache with sentinel (#25436)
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2026-05-16 09:19:21 +08:00 |
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fzyzcjy
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6a1b05d706
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Replace single-line defensive getattrs with direct access (#25435)
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2026-05-16 09:18:43 +08:00 |
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fzyzcjy
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27c3190215
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Remove fields that are never used in spec/engine/disagg (#25434)
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2026-05-16 09:18:00 +08:00 |
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fzyzcjy
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e065445236
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Remove managers' unused fields (#25433)
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2026-05-16 09:17:11 +08:00 |
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fzyzcjy
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33d63aa7e1
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Remove dead self.adder/can_run_list/running_bs writes in Scheduler._get_new_batch_prefill_raw (#25432)
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2026-05-16 09:12:39 +08:00 |
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fzyzcjy
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824ad24149
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Convert local-only self.X attributes to locals (#25430)
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2026-05-16 09:05:43 +08:00 |
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Yuhao Yang
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18c16f8660
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Port SGLANG_OPT_SWA_EVICT_DROP_PAGE_MARGIN from deepseek_v4_dev (#25419)
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2026-05-15 17:39:13 -07:00 |
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Brayden Zhongandb8zhong
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d523ae127f
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Fix Mistral Large 3 nightly test (#25407)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-15 17:28:35 -07:00 |
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5ba69f50fb
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Add multi-detokenizer support (#24944)
Co-authored-by: ybyang <10629930+whybeyoung@users.noreply.github.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-05-15 17:26:26 -07:00 |
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Hanming Lu
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afc7c9f7f3
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[TRTLLM/SWA/Spec] fix trtllm mha + swa + spec accept length drop (#25103)
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2026-05-15 17:15:31 -07:00 |
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jasonjk-park
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3c2956d880
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Add extension points on SpeculativeAlgorithm for custom spec v2 (#24999)
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2026-05-15 15:45:31 -07:00 |
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Xinyuan Tong
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7cb4669a04
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[Fix] DeepSeek-V3.2: build structural tag locally to encode both wrapper and invoke layers (#25233)
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2026-05-15 14:32:50 -07:00 |
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Liangsheng Yin
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494ee71189
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split test_dsa_models_mtp into 4 files (#25318)
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2026-05-15 14:16:57 -07:00 |
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Cheng WanandClaude Opus 4.7
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54221dd998
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feat(moe): reuse prev-layer output as symm_output for FP4 routed MoE (#25379)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-15 12:05:40 -07:00 |
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Alex Nails
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4df42da658
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Introduce CudaDeviceMixin and CudaSRTPlatform (#24096)
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2026-05-15 10:59:02 -07:00 |
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Cheng WanandClaude Opus 4.7
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ee93795476
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perf(mla): hybrid Triton fused cat+FP8-quantize for MLA chunked-prefill K/V (#25333)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-15 10:51:00 -07:00 |
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Kai-Hsun ChenandClaude Opus 4.7
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17c8a2fa53
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[Llama4] Use strided in-place fused QK RMSNorm to drop a redundant copy (#25089)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-15 10:33:08 -07:00 |
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Zhangheng
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21b3ac52b4
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[UnifiedTree]: Fix UnifiedRadixCache device match semantics with HiCache (#25277)
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2026-05-16 00:40:55 +08:00 |
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Cheng Wan
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3f7e538b2f
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Add NPU condition for cosine and sine caching (#25399)
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2026-05-15 05:21:53 -07:00 |
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Chi McIsaac
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20123e0b16
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[diffusion] fix: mount Cache-DiT before torch.compile in native denoising (#25328)
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2026-05-15 18:08:39 +08:00 |
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