Michael
|
cf8f1df6e8
|
[AMD] add dedicated jit-kernel-benchmark-test-amd stage + register portable JIT benches (#30307)
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2026-07-08 18:09:05 -07:00 |
|
Xinyuan Tong
|
074bb928f0
|
Move template manager files under parser; update CODEOWNERS (#26052)
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2026-07-08 16:47:36 -07:00 |
|
Xinyuan Tong
|
937734d3ed
|
ci(nightly): add force_baseline_update dispatch input for precision job (#30495)
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2026-07-08 16:27:41 -07:00 |
|
YC Yen-Ching Tseng
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fc378f843e
|
[AMD] Temporarily reduce AMD scheduled test frequency to save resource (#30534)
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2026-07-08 09:30:59 -07:00 |
|
YC Yen-Ching Tseng
|
669b4bc72b
|
[AMD] Gate stage-c on stage-b-test-1-gpu-large-amd (#30496)
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2026-07-08 15:41:21 +08:00 |
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 YC Yen-Ching Tsengandbingxche
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9bf122a455
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[AMD] Run MI355X disaggregation Nightly Test with runtime checkout code mechanism (#30386)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-07-08 09:27:49 +08:00 |
|
Michael
|
b363249423
|
[AMD] ci: run multimodal_gen unit suite on AMD (#30309)
|
2026-07-07 16:02:58 -07:00 |
|
zijiexia
|
0bf7ddb481
|
docs(install): add nightly install + docker tag guidance, and auto-bump version on release tag (#30308)
|
2026-07-07 12:10:05 -07:00 |
|
Alison Shao
|
99db3b0fa5
|
ci: run jit-kernel tests on scheduled full runs (#30306)
|
2026-07-07 00:14:39 -07:00 |
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hhhh1252023
|
1b481deade
|
feat: sync npu nightly test improvements from Ascend testcases (#29403)
|
2026-07-06 22:41:15 +08:00 |
|
ashwini rathi
|
cc7d7ba3dd
|
[Intel XPU] Bump nightly per-file timeout to 120m and extend XPU CI monitor (#30100)
|
2026-07-06 12:26:28 +08:00 |
|
Xiaoyu Zhang
|
6dd0cefb2a
|
[CI] Revert ModelOpt NVFP4 threshold relax (#29844)
|
2026-07-04 21:17:32 +08:00 |
|
R0CKSTAR
|
7820dc60a7
|
[Apple Silicon] Add labeler config (#29908)
Signed-off-by: Xiaodong Ye <yeahdongcn@gmail.com>
|
2026-07-03 09:43:00 -07:00 |
|
YC Yen-Ching Tseng
|
67697fb891
|
[AMD] Temporarily disabled: every-6-hours rocm 7.2 test (#30014)
|
2026-07-03 15:38:07 +08:00 |
|
 Kangyan-ZhouandClaude Opus 4.8
|
860244d4b4
|
[CI] Add per-stage NVIDIA model inventory tool (#29447)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-07-02 20:38:04 -07:00 |
|
 ashwini rathiandClaude Opus 4.7
|
75cdaf432a
|
Add XPU CI job monitor workflow (#29807)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-07-03 08:30:17 +08:00 |
|
Jae B.
|
4605d4d94b
|
[Apple Silicon] [CI] Add model-free unit-test workflow on macos-26 (#29691)
|
2026-07-01 21:00:22 -07:00 |
|
 Zhaoyi LiandMichael
|
a3f6680874
|
[AMD]: docker(rocm) bump Mooncake to latest main + enable multi-protocol (#27730)
Co-authored-by: Michael <13900043+michaelzhang-ai@users.noreply.github.com>
|
2026-07-01 17:41:46 -07:00 |
|
Lianmin Zheng
|
76d828a4e8
|
Add pranjalssh to CI_PERMISSIONS.json (#29870)
|
2026-07-01 14:52:02 -07:00 |
|
 Zhaoyi Liandbingxche
|
9bb7de9258
|
[AMD][DI][CI] 2/N Add DSV4 DP8/EP8 and MTP MI355X 1P1D nightly recipes (#29784)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-07-01 23:46:48 +08:00 |
|
Mick
|
79f334b1aa
|
[diffusion] CI: add 5090 job (#29791)
|
2026-07-01 19:09:43 +08:00 |
|
 ashwini rathiandSinghal, Shubham
|
5134dcdcab
|
[Intel XPU] Initially add nightly GSM8K accuracy tests for Llama-3.1-8B (TP=2) and Qwen3-32B (TP=4) (#28908)
Co-authored-by: Singhal, Shubham <shubham.singhal@intel.com>
|
2026-07-01 16:27:24 +08:00 |
|
Bingxu Chen
|
548f505cc5
|
[AMD] Cover DeepSeek-R1 MXFP4 TP4 MTP nightly CI (#29290)
|
2026-07-01 01:21:17 -07:00 |
|
YC Yen-Ching Tseng
|
308d89e042
|
[AMD] Split qwen3.5 triton DCP test into its own nightly job (#29409)
|
2026-07-01 00:39:39 -07:00 |
|
 YC Yen-Ching Tsengandbingxche
|
c70cc96905
|
[AMD] Stop rocm720 pr auto-runs (#29768)
Co-authored-by: bingxche <bingxche@users.noreply.github.com>
|
2026-06-30 23:58:25 +08:00 |
|
 YC Yen-Ching Tsengandbingxche
|
f2756f53f3
|
[AMD] Update AMD local registry address (#29765)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-06-30 23:40:00 +08:00 |
|
 
|
b6907d9664
|
docker: install dynamo nightly in the dev image for rapid iteration/testing (#29634)
Co-authored-by: Kangyan Zhou <zky314343421@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-06-29 22:58:19 -07:00 |
|
 Zhaoyi Liandbingxche
|
6bf15aa2b9
|
[AMD]: Enable NIXL PD disaggregation for ROCm(1/n) (#28348)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-06-29 21:23:09 -07:00 |
|
Zaili Wang
|
8dbf04fc56
|
Add new Intel SGLang members into CI_permission list (#29700)
|
2026-06-30 11:06:28 +08:00 |
|
 
|
3e16be2122
|
[CI] Migrate JIT tests to runner config registration (#29066)
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-06-29 19:12:14 -07:00 |
|
 YC Yen-Ching Tsengandbingxche
|
5169df70f6
|
[AMD] Sgl-data mount opt-in (#29661)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-06-29 22:11:37 +08:00 |
|
Mick
|
97ddc66209
|
[diffusion] nightly: track SGLang-Diffusion only (#29434)
|
2026-06-28 14:23:17 +08:00 |
|
Mick
|
91f9e7372d
|
[diffusion] CI: refactor CI (#28762)
|
2026-06-27 19:22:27 +08:00 |
|
 Yaochen Hanandronnie_zheng
|
c98d31143d
|
update quantization code owner and document quantization contributions (#26784)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
|
2026-06-26 19:40:33 +03:00 |
|
 
|
b73e57210a
|
[AMD CI] Add nightly Miles ROCm 7.2 MI350X suites (#28853)
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-06-26 18:47:00 +08:00 |
|
  
|
413aeac0c9
|
[AMD][DI][CI] 1/N: MI355X disaggregation nightly benchmark (#29084)
Co-authored-by: Michael <13900043+michaelzhang-ai@users.noreply.github.com>
Co-authored-by: bingxche <bingxche@amd.com>
Co-authored-by: yctseng0211 <yctseng@amd.com>
|
2026-06-25 19:21:28 -07:00 |
|
hhhh1252023
|
781537b61d
|
[NPU] Nightly CI refactor and enhancement (#27433)
|
2026-06-26 08:52:06 +08:00 |
|
Yueming Yuan
|
65f31acc6c
|
Add yueming-yuan to CI_PERMISSIONS.json (#29341)
|
2026-06-25 16:18:54 -07:00 |
|
Baizhou Zhang
|
3344b73c80
|
Add DeepSeek V4 Pro GB300 nightly and expand Kimi K25 nightly test (#28103)
|
2026-06-25 12:13:52 -07:00 |
|
YC Yen-Ching Tseng
|
bc150173b2
|
[AMD] Fix stage-b-test-1-gpu-small-amd-nondeterministic timeout after VLM model swap (#29234)
|
2026-06-25 03:56:04 -07:00 |
|
jiayisunx
|
32bae911f6
|
Add CI permission for jiayisunx (#28899)
|
2026-06-25 14:49:07 +08:00 |
|
 Zhiyao JiangandXinyu Jiang
|
d1cf09d4d4
|
[AMD-miles] Add a ROCm 7.0 MI35x miles nightly image (#29219)
Co-authored-by: Xinyu Jiang <xinyuj2@andrew.cmu.edu>
|
2026-06-25 11:27:06 +08:00 |
|
Even Zhou
|
39f5de9ba1
|
[NPU] bump sgl-kernel-npu to 2026.6.2 (#29101)
|
2026-06-24 15:59:41 +08:00 |
|
Michael
|
c07811bfc6
|
[AMD] Register MI355X 2N 1P1D disagg nightly workflow for testing (#29091)
|
2026-06-24 08:41:55 +08:00 |
|
 
|
b42c79c4eb
|
[AMD] Fix AMD extra scheduled runs cancelling each other (#28989)
Co-authored-by: bingxche <bingxche@amd.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-06-23 11:48:32 +08:00 |
|
Michael
|
28d5627fd8
|
[AMD] register kv_canary + mock_model e2e tests to extra-a (1-gpu-small + 2-gpu-large) (#28850)
|
2026-06-22 19:06:31 -07:00 |
|
Liangsheng Yin
|
a32f7111e4
|
[CI] Disable async-assert for base-a tests in rerun-test (#28965)
|
2026-06-22 15:29:45 -07:00 |
|
YC Yen-Ching Tseng
|
73448b0d70
|
[AMD] Temporarily disable deepseek V4 in AMD PR test (#28871)
|
2026-06-22 10:48:38 +08:00 |
|
Michael
|
653f6735a0
|
[AMD] add nightly kv_canary JIT benchmark suite (#28611)
|
2026-06-19 19:46:34 -07:00 |
|
Michael
|
871ed0dc0c
|
Revert "ci: add 4-GPU mi35x runner and rebalance off the saturated 8-GPU pool" (#28751)
|
2026-06-19 16:23:18 -07:00 |
|