 Jialin Ouyang
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717a559f02
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[Scheduler] Align WAR fences with CUDA graph metadata reads (#33587)
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2026-08-05 13:52:20 -07:00 |
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ea65f8ddc9
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Feat/spectrum (#31491)
Co-authored-by: jaron1990 <jaron1990@gmail.com>
Co-authored-by: jaron1990 <34618972+jaron1990@users.noreply.github.com>
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com>
Co-authored-by: alexnails <alex.nails@radixark.ai>
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2026-08-05 13:23:17 -07:00 |
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5c4f72f92a
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[Build] Add srt_empty extra group for device-agnostic install (#31300)
Co-authored-by: yixiaodapeng <yixiaodapeng@example.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-05 13:17:46 -07:00 |
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Liangsheng Yin
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de34dd11e9
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[CI] Fold duplicate-server suites and prune the retract matrix on 1-gpu-5090 (#33745)
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2026-08-05 12:41:51 -07:00 |
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Jason Mancuso
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36853b8ffc
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[Spec] Support logprobs with DFlash (#33459)
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2026-08-05 12:37:12 -07:00 |
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Khoa Pham
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5f79cf3511
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[DCP] Match the replicated draft KV pool's page granularity to its allocator (#33348)
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2026-08-05 11:40:28 -07:00 |
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Jialin Ouyang
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b1bd871df5
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[Unified Radix Cache] Complete the tree-core interface boundary (#33580)
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2026-08-05 11:39:28 -07:00 |
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cctry
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96c89863a3
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Measure prefill busy time between launches (#33595)
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2026-08-05 11:26:27 -07:00 |
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WenhaoZhang
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acaab22d09
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[diffusion] feat: add SageAttention packed varlen path for minimax-h3 (#33703)
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2026-08-06 01:19:58 +08:00 |
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zhaozx-cn
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4e7209caa8
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[NPU] Add causal conv1d (#28267)
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2026-08-05 22:22:49 +08:00 |
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Xiaoyu ZhangandClaude Fable 5
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3425c93666
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[diffusion] Wan VAE RMSNorm+SiLU fusion behind quality=high (H200 FastWan2.2 e2e 9.611 -> 9.125 s) (#33546)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-05 21:33:35 +08:00 |
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silencejade
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593777c046
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[FIX] [benchmark] Fix flush_cache failure after warmup by waiting for server idle (#33527)
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2026-08-05 21:27:43 +08:00 |
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Xuan LiaoandMa Mingfei
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3b4fac5b99
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[XPU] DeepSeek V4: use sgl-kernel-xpu implemetation of flash_mla_sparse_fwd for prefill (#31865)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-08-05 21:05:53 +08:00 |
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Mick
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99709f734d
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[VLM] split multimodal scheduling from mm_utils (#32415)
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2026-08-05 20:24:12 +08:00 |
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Xiaoyu ZhangandClaude Fable 5
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a5888c956f
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[diffusion] Pack Ulysses Q/K/V input all-to-all into one collective + reusable a2a staging buffers (#33667)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-05 19:15:46 +08:00 |
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2f22ed58ea
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[NPU] Adding a fast layernorm for diffusion models and fix BSA (#29027)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: ronnie_zheng <zl19940307@163.com>
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2026-08-05 14:06:00 +03:00 |
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22d558b103
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[Feature] Add GLM Image usage report (#33378)
Co-authored-by: wuyuefeng <wuyuefeng@noreply.gitcode.com>
Co-authored-by: ronnie_zheng <zl19940307@163.com>
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2026-08-05 13:59:49 +03:00 |
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Alex NailsandClaude Fable 5
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6fa3f9df11
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[Bugfix] Treat unsharded model.safetensors as HF weights in Mistral-native format detection (#33671)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-05 01:54:46 -07:00 |
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a6e5fa7081
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[Scheduler] Honor explicit min-free-slots thresholds (#33403)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
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2026-08-05 01:44:18 -07:00 |
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Trevor Morris
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81c7a54ecd
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[NVIDIA] Use sm_100f instead of sm_100a for sgl-kernel and FlashMLA (#33433)
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2026-08-05 01:36:46 -07:00 |
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Xinyi Song
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1478cdec9f
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[AMD] Fuse Kimi-K3 attn-residual aggregation (#33599)
HIP Gated changes
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2026-08-04 23:20:04 -07:00 |
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Артем СавкинandXiaoyu Zhang
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d96df7bed5
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[Diffusion] Batch GLM-Image AR requests (#30683)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-08-05 08:47:06 +03:00 |
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059269594c
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[DSV4] Add official DSV4 reasoning effort support (#33140)
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: David Orman <ormandj@corenode.com>
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2026-08-05 12:50:41 +08:00 |
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Liangsheng Yin
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198a3bc29b
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[Test] Route GEMM backend UTs through real layer modules and weight loaders (#33615)
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2026-08-04 20:53:26 -07:00 |
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Liangsheng Yin
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1033cae8d5
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[CI] Speed up dependency install: dual-ABI Rust ext cache and prevalidation pruning (#33619)
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2026-08-04 20:33:48 -07:00 |
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Kaixi
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6c05aaae7e
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[trtllm_mha] perf: Stop allocating per-layer scratch inside the decode CUDA graph (#33063)
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2026-08-04 19:27:26 -07:00 |
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4949b5fccf
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[XPU] Add qknorm_rope support for Flux (#30883)
Co-authored-by: Chandrakant Khandelwal <Chandrakant.Khandelwal@intel.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-08-05 10:12:24 +08:00 |
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gjsheu
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5dc4102960
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[npu] [bugfix] Fix PD‑disaggregation error (#33523)
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2026-08-05 09:54:00 +08:00 |
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a0b04dbe4c
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feat(grpc): add generation request semantics (#32588)
Signed-off-by: Connor Carpenter <connorc@nvidia.com>
Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-04 18:53:45 -07:00 |
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Polisetty V R K Jyothendra VarmaandMa Mingfei
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d2c405f19d
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[Intel GPU] DeepSeek V4 8/N: use sgl-kernel implementation of fused_k_norm_rope_flashmla on XPU (#28040)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-08-05 09:28:43 +08:00 |
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211ee64249
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[rotary] Rebuild the shared RoPE cache entry when its buffers are dead (#33575)
Co-authored-by: mxz <mxz@fb.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-08-04 17:24:42 -07:00 |
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Liangsheng Yin
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a0b3f1dde6
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[Test] Replace GEMM backend e2e matrices with layer-level unit tests (#33596)
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2026-08-04 15:50:41 -07:00 |
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Lianmin Zheng
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b0fd31ba07
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Multiple flexibility fixes for DP attention (#33537)
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2026-08-04 15:40:40 -07:00 |
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cctry
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c8822fd990
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Clarify post-capture KV reservation logs (#33598)
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2026-08-04 15:06:11 -07:00 |
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FilipandClaude Opus 4.8
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19d3f86895
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[LoRA] Laguna: per-layer LoRA hidden-dim resolution for packed attention (#30298)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-08-04 14:48:05 -07:00 |
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Xinyuan TongandAlex Nails
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a9c3b55435
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[Refactor] Keep chat template validation out of ServerArgs dispatcher (#33392)
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-04 14:45:47 -07:00 |
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Lianmin Zhengandcctry
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34af3ff386
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Allow optimistic prefill with L2 hierarchical cache and write-back policy (#33545)
Co-authored-by: cctry <cctry@meta.com>
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2026-08-04 13:23:08 -07:00 |
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+26
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abddb1c7e9
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[Kimi] Support kimi-k3 (#32541)
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Chunan Zeng <zcnrex@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
Co-authored-by: Zijie Xia <37504505+zijiexia@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: zhangxiaohao <1024393531@qq.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Julien Lin <jullin@nvidia.com>
Co-authored-by: Hao Phan <htphan@nvidia.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: RolaoDenthu <xinyisong0111@gmail.com>
Co-authored-by: pigeonsoup <32922982+pigeonsoup@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Pranjal Shankhdhar <pranjal.ssh@gmail.com>
Co-authored-by: Lee Nau <lee.nau@gmail.com>
Co-authored-by: HMING <126185151+Hearum@users.noreply.github.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
Co-authored-by: Cheng Wan <cheng.wan@radixark.ai>
Co-authored-by: BBuf <xiaoyu.zhang@radixark.ai>
Co-authored-by: Hanming Lu <hanminglu@meta.com>
Co-authored-by: Xinyi Song <xinyis10@illinois.edu>
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2026-08-04 13:22:49 -07:00 |
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Xingyu Liu
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aa06433709
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Avoid TRTLLM prefill output copy (#33306)
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2026-08-04 12:54:04 -07:00 |
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38dc2d6cf8
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[metrics] Split tokenizer request metrics by stream (#32734)
Co-authored-by: wpc <wpc@devvm23443.cco0.facebook.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-08-04 12:53:52 -07:00 |
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Lianmin Zheng
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4794b401d5
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[Observability] Add startup, memory, and hybrid SWA diagnostics (#33375)
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2026-08-04 12:50:09 -07:00 |
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Lianmin ZhengandJialin Ouyang
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5081c063c0
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fix(metrics): clear forward occupancy on idle (#33562)
Co-authored-by: Jialin Ouyang <Jialin.Ouyang@gmail.com>
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2026-08-04 12:49:17 -07:00 |
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Lianmin ZhengandItai Gat
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dea2be5ae3
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[CUDA Graph] Allow custom decode graph runners (#33553)
Co-authored-by: Itai Gat <itaigat.mail@gmail.com>
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2026-08-04 12:48:56 -07:00 |
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e76d0acdc9
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migrate NPU PR/nightly test cases to a3-560T (#33346)
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: sglang-npu-bot <sglangnpu@163.com>
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2026-08-05 01:17:58 +08:00 |
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Xiaoyu ZhangandClaude Fable 5
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95d0e57e83
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[diffusion] Fuse DiT FFN tanh-GELU into up-proj GEMM (cublasLt epilogue) behind quality=high (Qwen-Image 1024^2 denoise 12.36 -> 12.05 s on H200) (#33536)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-04 23:49:43 +08:00 |
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Xiaoyu Zhang
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0d0c7d853f
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[diffusion] FLUX.2 VAE decoder fast path behind quality=high (H200: 1024^2 97.6->29.2 ms, 2048^2 437.2->168.5 ms) (#33451)
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2026-08-04 23:48:19 +08:00 |
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Lianmin Zheng
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7adf2f4a9a
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Inline _set_gc into _set_envs_and_config (#33538)
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2026-08-04 07:31:56 -07:00 |
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Lianmin ZhengandYinghai Lu
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d257b58e67
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[Router] Report accelerator count in /v1/loads (#33548)
Co-authored-by: Yinghai Lu <yinghai@meta.com>
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2026-08-04 05:55:35 -07:00 |
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Lianmin Zheng
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8f2a3ad6d7
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[mem_cache] Label HiCache host pools and clarify post-capture KV sizing logs (#33445)
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2026-08-04 04:21:36 -07:00 |
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jacky.cheng
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723c277640
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[AMD] [Fix] Enable aiter hd256 FP8 prefill FMHA on gfx950 (#33399)
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2026-08-04 02:40:33 -07:00 |
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