Commit Graph
9342 Commits
Author SHA1 Message Date
Shangming CaiandAbatom 6a012fbb2d [PD] Fix ZMQ stale socket reconnection in PD disaggregation (#27796)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Abatom <abzhonghua@gmail.com>
2026-06-11 19:51:12 +08:00
shuwennandClaude Opus 4.8 66076f2409 [mem_cache][3/N] refactor: move HiSparse allocators to allocator/hisparse.py (#26678)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-06-11 19:50:24 +08:00
Zhonghua Deng be45745f38 [EPD] fix: zmq PUSH socket reconnect-aware connection management with tcp keepalive (#27039) 2026-06-11 19:32:31 +08:00
Mohammad Miadh Angkad 7e245afefe [CI] Fix registered sigmoid gate mul test location (#27909) 2026-06-11 18:52:37 +08:00
Mohammad Miadh Angkad 6ac9f66596 Remove MoE prefill CUDA graph disable guard (#27841) 2026-06-11 18:30:15 +08:00
luoroger37 54cba63b6c Fix paged SWA free mapping cleanup (#27779) 2026-06-11 18:25:24 +08:00
jacky.cheng 22c7285a26 [AMD] Fuse sigmoid + mul attention output gate into single Triton kernel (#27630) 2026-06-11 02:05:05 -07:00
jacky.cheng f4b3b99413 [AMD] Enable fused GDN QKV split Triton kernel on HIP (#27583) 2026-06-11 02:01:27 -07:00
Liangsheng Yin 493bb6ae0d Fix fp16 NaN flake in spec CI: bf16 eagle fixture; sanitize NaN logits in sampler (#27883) 2026-06-11 01:16:12 -07:00
kkandwunhuang b8376aebd0 [AMD] Fix the dsv4 performance of MoE issue. (#27858)
Co-authored-by: wunhuang <wunhuang@amd.com>
2026-06-11 01:06:54 -07:00
gaopengff dc1e46ec8f [Intel GPU]Add sycl mrope pass for xpu device (#27646) 2026-06-11 12:25:55 +08:00
Zhangheng 5e0271536a [UnifiedTree]: HybridModel launches HiCache via UnifiedTree by default. (#27759) 2026-06-11 12:03:36 +08:00
Zilin Zhu 9788c8e867 [RL] Handle Mooncake buffers across memory release (#27696) 2026-06-11 11:15:00 +08:00
YAMY f8b0a120b8 fix: DSV4 BCG compress-prefill plan OOB on underfilled (tiny) prefill replay (#27747) 2026-06-10 20:02:24 -07:00
Cheng Wan f4f30d7d23 [Fix] Use int64 seq_lens across all CUDA graph runners and backends (#27840) 2026-06-10 19:54:58 -07:00
Yihao Wang b4bed8c398 [diffusion] fix: cast to float32 (from float64) in triton kernel to unblock torch.compile (#27709) 2026-06-11 10:29:21 +08:00
David Wang 588d1f7bc9 [Feature] Spec V2 DFlash Support (#23000) 2026-06-10 19:27:42 -07:00
Hexq0210 475e9d25bf bugfix for npu mtp graph runner (#27808) 2026-06-11 10:09:50 +08:00
YanbingJiang 66989a7642 Fix gpt-oss-20b with mxfp4 support for Xeon (#27782) 2026-06-11 09:16:16 +08:00
fxmarty-amd 99ab90c5b7 [AMD] Restore AMD piecewise CUDA graph support dropped by #23906 (#27811) 2026-06-10 17:43:48 -07:00
Lijuan TangandClaude Opus 4.8 5f913c1135 [Fix] Emulate PDEATHSIG on macOS to prevent orphaned worker processes (#27190)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-06-10 17:43:27 -07:00
Yongji Wuandhzh0425 db061e97c0 [Unified] Fix UnifiedRadixCache write_backup issue in write-back mode(#27108)
Co-authored-by: hzh0425 <hzh0425@apache.org>
2026-06-11 08:28:24 +08:00
740305e1d9 [HiCache] Add opt-in LRU eviction to file storage backend (CP-aware) (#26670)
Co-authored-by: Zhangheng <hzh0425@apache.org>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-06-11 08:21:59 +08:00
Liangsheng Yin 16124fc9b2 [Metrics] Fix fwd_occupancy reading NaN on every decode log line; probe-free base-a (#27836) 2026-06-10 15:42:19 -07:00
Mohammad Miadh Angkad bdf3ef6421 [CI] Fix registered QK Gemma RMSNorm test location (#27839) 2026-06-10 15:21:59 -07:00
jacky.cheng 0da18f8d91 [AMD][Perf] Fuse QK RMSNorm + gate extraction Triton kernel for Qwen3.5 on HIP (#27656) 2026-06-10 14:29:33 -07:00
Baizhou Zhang 3c1b0fb226 [1/n] [CP] Simplify prefill context parallel server args (#27312) 2026-06-10 14:11:38 -07:00
Liangsheng Yin 5fefe91289 [Spec] NGRAMWorker on BaseSpecWorker; algo-owned verify-tree shape params (#27799) 2026-06-10 12:38:16 -07:00
shuwennandQiaolin Yu 3600a9ac5f [SPEC] feat: init adaptive spec params from config (#27493)
Co-authored-by: Qiaolin Yu <liin1211@outlook.com>
2026-06-10 18:55:25 +00:00
billishyahaoandHAI 0ae27405d0 [AMD] Support eplb for moriep (#22985)
Co-authored-by: HAI <hixiao@gmail.com>
2026-06-10 10:23:51 -07:00
Kai-Hsun Chen 8c6bbe0658 [deepseek] Enable DP attention + TBO + shared experts fusion (#27510) 2026-06-10 09:42:27 -07:00
502bc89e1b [AMD] Fix DeepSeek V4 Pro c128 state tensor dtype mismatch error and c4_sparse_raw_indices attribute error in cuda graph phase (#27529)
Co-authored-by: YC Yen-Ching Tseng <yctseng@amd.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
2026-06-10 08:30:48 -07:00
Yuan Luoandluoyuan.luo 518e35fae7 [KDA] Add CuteDSL Prefill Kernel on SM100 (#27488)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2026-06-10 21:25:19 +08:00
111009ea54 [Feature] [Ngram spec] Support ngram spec v2 (#17260)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Ratish P <114130421+Ratish1@users.noreply.github.com>
2026-06-10 02:46:00 -07:00
ChengYao-amdandgithub-actions[bot] 255843d454 Support for Zyphra zaya1 model (#26347)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
2026-06-10 02:44:47 -07:00
Cheng Wan 70c71ba183 [NPU] Fix dead patch_model monkey-patch breaking NPU torch.compile capture (#27774) 2026-06-10 01:15:50 -07:00
Ziang Li 01f10acd06 Implement online nvfp4 quantization (#26083) 2026-06-10 00:26:51 -07:00
Thomas WangandXinyi Song f2bcdb0508 [AMD] Add unified kv attention support in dpsk-v4 (#27380)
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
2026-06-09 23:13:37 -07:00
Cheng Wan 95d8a75bc9 Bundle set_kv_buffer write targets into KVWriteLoc (loc + swa_loc) (#27695) 2026-06-09 23:09:51 -07:00
Cheng Wan 758fd4bb9a [SWA] Cache full→SWA out_cache_loc per forward across attention backends (#27617) 2026-06-09 22:57:51 -07:00
Aleksi Vesanto 08ceb96ea5 [diffusion] fix: remove boolean arithmetic guard to fix compiling (#27065) 2026-06-10 13:55:47 +08:00
Liangsheng Yin d1895cb60d [Spec] Extract move_accept_tokens_to_target_kvcache into spec_utils (#27764) 2026-06-09 21:55:26 -07:00
2495c02c2c [Refactor] Cuda Graph Runner/Backend Refactor (#23906)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
2026-06-09 21:36:57 -07:00
Mick 56f06278c6 [diffusion] refactor: refactor realtime control state and adapters (#27698) 2026-06-10 12:27:16 +08:00
Baizhou Zhang 047e5df3b1 Revert "Share BCG output buffers across capture sizes" (#27758) 2026-06-09 20:51:40 -07:00
Lianmin Zheng 165331a200 Share BCG output buffers across capture sizes (#27659) 2026-06-09 20:33:46 -07:00
fatSheep d21c31f681 fix: forward update_mamba_state_after_mtp_verify in HybridAttnBackend (#25883) 2026-06-09 20:06:50 -07:00
huangtingwei f101b287ef [Unified Tree]fix compatibility with eagle key and l3 hicache (#27655) 2026-06-10 10:54:45 +08:00
sushil Dubey 5809bbe35d Mistral3 add tensor parallel support for diffusion text encoder (#25950) 2026-06-10 09:43:21 +08:00
Mick af55025644 [diffusion] refactor: refactor realtime and model-specific stage modules (#27697) 2026-06-10 09:39:06 +08:00