 Liangsheng Yin
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9bb9d17e1a
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[Spec] Unify speculative grammar token-accept path in decode processing (#28682)
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2026-06-19 02:49:40 -07:00 |
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4d94e9471a
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[AMD] Relax allreduce-fusion residual accuracy tolerance to 1 bf16 ULP (#28226)
Co-authored-by: kangwangamd <kangwangamd@users.noreply.github.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
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2026-06-18 19:18:53 -07:00 |
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giang_ng_tr
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b36360dc5b
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[AMD][Perf] Split-KV flash-decode attention for EAGLE target-verify (Triton backend) (#27382)
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2026-06-18 19:11:10 -07:00 |
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huangtingweiandhzh0425
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6b7ecca663
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[HiCache]Support hybrid pool staged H2D kernel (#28434)
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-06-19 09:48:03 +08:00 |
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Rain Jiang
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ef01618dfb
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support MPServer and embedded server for granian to enable muti tokenizer worker (#28573)
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2026-06-18 17:59:12 -07:00 |
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Michael
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62ab09a478
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[AMD] register 2 spec tests to stage-b-test-1-gpu-large-amd (batch-5) (#28558)
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2026-06-18 16:33:23 -07:00 |
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giang_ng_tr
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c1067f88d6
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[AMD][Perf] Tune extend attention block sizes for gfx950 (head_dim > 128) (#27793)
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2026-06-18 15:16:52 -07:00 |
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Baizhou Zhang
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e3026ef016
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[3/N][CP] Implement zigzag CP strategy (#28421)
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2026-06-18 15:10:30 -07:00 |
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9fc9d37f6d
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Fix spec decoding with grammar in disagg (#24082)
Co-authored-by: jimmy.shong <jimmy.shong@radixark.ai>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Codex <codex@example.com>
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2026-06-18 14:58:32 -07:00 |
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bea282cede
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[DeepSeek-V4] Fuse UE8M0 scale rounding into FP8 group quantization (#26766)
Co-authored-by: liqichao <liqichao@baidu.com>
Co-authored-by: yhyang201 <yhyang201@gmail.com>
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2026-06-18 14:41:56 -07:00 |
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Zhaoyi Li
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27a374eaef
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[AMD][CI] Use non-gated Qwen3-8B for MI35x disaggregation tests (#28678)
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2026-06-18 14:29:35 -07:00 |
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Liangsheng Yin
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8f6d9ef9a5
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[misc] Drop redundant req_pool_indices_cpu guards; fold hisparse into GLM-5.1 e2e (#28607)
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2026-06-18 12:51:23 -07:00 |
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Zhanghengandispobock
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867707f1f2
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[UnifiedTree]: move some kl test from base to extra stage (#28627)
Co-authored-by: ispobock <ispobaoke@gmail.com>
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2026-06-18 01:39:46 -07:00 |
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Vladislav NosivskoyandZhangheng
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b7ae7149e8
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[HiCache] Fix SWA L3 cache miss due to a prefetch/hit len mismatch (#27291)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-06-18 14:55:00 +08:00 |
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DovLin
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0188c54fbe
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[FA3] Add unit test for only_qv (NoPE) KV decode path (#28595)
Signed-off-by: Shijin Zhang <dovis.zhang02@gmail.com>
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2026-06-17 23:41:44 -07:00 |
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Michael
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5d1949152d
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[AMD] ci: add extra-a 1-gpu-large tier (fp8kv-triton, streaming-session, spec-standalone) (#28458)
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2026-06-17 23:31:32 -07:00 |
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Michaelandmichaelzhang-ai
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0e5a66dca4
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[AMD] Register 3 JIT kernel unit tests for AMD CI (#27837)
Co-authored-by: michaelzhang-ai <michaelzhang@example.com>
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2026-06-17 23:28:56 -07:00 |
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cctry
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7976928c57
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Abort during chunked prefill + PD peer-liveness abort (#28086)
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2026-06-17 23:13:28 -07:00 |
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Yuan Luoandluoyuan.luo
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3340f4e3da
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[GDN][KDA][mem_cache] int8 checkpoint pool for the linear-attn prefix cache (#28185)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-06-17 20:41:46 -07:00 |
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Cheng Wan
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53318911ca
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Add get_parallel(): a structured accessor for parallel-topology state (#28567)
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2026-06-17 20:23:43 -07:00 |
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Dongjun Na
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462c01ea6b
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[observability] add Ray metric backend wrappers (#26252)
Signed-off-by: Dongjun Na <kmu5544616@gmail.com>
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2026-06-17 19:41:53 -07:00 |
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luoroger37
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c208a96a7d
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Fix ScheduleBatch req pool CPU metadata (#28514)
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2026-06-17 19:25:47 -07:00 |
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Liangsheng Yin
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9888b7b42b
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[misc] Trim dead code in trtllm_mha page-table backend; reuse eager page-table buffer (#28578)
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2026-06-17 18:36:22 -07:00 |
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zijiexia
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74e2e48c82
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Introduce CpuDeviceMixin and CpuSRTPlatform (#26385)
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2026-06-17 17:41:17 -07:00 |
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cctry
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cfa4aa988f
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Revert "revert the head_dim assignment from PR 23862" (#28583)
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2026-06-17 17:11:05 -07:00 |
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Liangsheng Yin
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a663500ea9
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[Test] Fold EAGLE return_hidden_states regression into spec triton suite (#28577)
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2026-06-17 16:42:02 -07:00 |
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5ea0d1d093
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add dflash gemma4 support (#27471)
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-06-17 16:39:28 -07:00 |
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Jonny Kongandjonnykong
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cd60c4edd0
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[attn backend] Make seq_lens_cpu optional in trtllm_mha backend (#28106)
Co-authored-by: jonnykong <jonnykong@fb.com>
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2026-06-17 16:24:19 -07:00 |
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Khoa PhamandClaude Opus 4.7
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e4fd613def
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[Spec] Fix return_hidden_states under spec V2 (issue #26163) (#28496)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-17 16:21:36 -07:00 |
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cctry
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5d6b35eabb
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revert the head_dim assignment from PR 23862 (#28571)
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2026-06-17 15:46:28 -07:00 |
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Lijuan Tang
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0a28a929dc
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[MLX] Add Metal profiling hooks to server profiler (#28122)
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2026-06-17 13:06:20 -07:00 |
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Thomas WangandBingxu Chen
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f5b041622b
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[AMD] Fix deepseek-v4 mtp accept length issue (#28520)
Co-authored-by: Bingxu Chen <bingxche@amd.com>
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2026-06-17 11:13:55 -07:00 |
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Ziang Li
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3fb65ebabd
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[RL] Fix FlashInfer TRTLLM MXFP8 dense weight layout (#28459)
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2026-06-17 10:33:35 +00:00 |
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Ryan Zzzandzhujunyu
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8fd1694dd2
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Deepseek v4: support mixed dtype compression states (#27277)
Co-authored-by: zhujunyu <zhujunyu.666@bytedance.com>
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2026-06-17 00:56:41 -07:00 |
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7256ee9871
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[AMD] Update test_aiter_allgather_amd.py data types alignment between benchmark aiter and custom all-reduce kernel (#27815)
Co-authored-by: YC Yen-Ching Tseng <yctseng@amd.com>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
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2026-06-17 00:48:15 -07:00 |
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Michael
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a2aa51c818
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[AMD] register 4 2-gpu tests to stage-b-test-2-gpu-large-amd (#28344)
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2026-06-16 21:58:34 -07:00 |
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Yanbin Jiang
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093908d4c0
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[LoRA] Fix chunked SGMV (csgmv) CUDA graph segment replay (#28371)
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2026-06-16 19:19:07 -07:00 |
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37ef295c78
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[AMD] Feat/dp moe reduce scatter (#28216)
Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: Wang, FangYuan <39615225+At1a8@users.noreply.github.com>
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2026-06-16 18:12:39 -07:00 |
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jasonjk-park
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d86a7e7018
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Custom spec algorithm can handle server args (#28162)
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2026-06-16 17:13:52 -07:00 |
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Qiaolin Yu
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2ad00faae1
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[ci] add kimi nvfp4 nightly tests (#28467)
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2026-06-16 16:49:51 -07:00 |
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huangtingwei
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9b4432fe18
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[HiCache]Asymmetric pool support direct backend (#28446)
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2026-06-16 13:17:57 -07:00 |
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13537f8e20
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Unskip Marlin NVFP4 tests (#27589)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
Co-authored-by: shaunkotek <shaunkotek@users.noreply.github.com>
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2026-06-16 11:58:22 -07:00 |
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feliang-gitandxutizhou
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92b42c8d8a
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LPLB: linear-programming load balancer for MoE expert parallelism (#24515)
Co-authored-by: xutizhou <xutingz@nvidia.com>
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2026-06-16 10:19:42 -07:00 |
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265202cda2
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fix(openai): validate assistant tool call arguments before chat template (#28035)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
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2026-06-16 12:21:23 +00:00 |
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Yinghai LuandLianmin Zheng
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fcca4611fa
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[CAR] Let custom allreduce support VMM based allocation (#27593)
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-06-16 04:49:05 -07:00 |
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Brayden ZhongandBrayden Zhong
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25e696aa8d
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Fix Stage B CUDA CI (#28367)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-06-16 02:39:17 -07:00 |
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Wang, FangYuanandThomas Wang
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a362ba9da3
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[AMD] Feat: Add prefill context parallel support for deepseek v4 unified kv attention (#27928)
Co-authored-by: Thomas Wang <thomawan@amd.com>
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2026-06-16 02:00:51 -07:00 |
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jacky.cheng
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149fabcca7
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[AMD] Fuse sigmoid + mul into single Triton kernel for shared expert gating (#27636)
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2026-06-16 01:16:58 -07:00 |
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Bingxu Chen
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0fc2bc4a8b
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[AMD] Test DeepSeek V4 FlashMLA backend variants nightly (#28290)
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2026-06-16 01:03:26 -07:00 |
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Baizhou Zhang
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77f327cb6e
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[2/n] [CP] Add context parallel strategy abstractions (#27313)
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2026-06-16 00:20:04 -07:00 |
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