 Alex Tumanov
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52b89c4948
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[misc] Add bench_serving compatibility shim (#28997)
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2026-06-23 19:49:53 -07:00 |
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Liangsheng Yin
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f76c6c95be
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[misc] Add sglang.bench_offline_throughput deprecation shim (#29085)
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2026-06-23 18:39:58 -07:00 |
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Liangsheng Yin
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11e7c9e0e6
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[misc] Add sglang.bench_one_batch deprecation shim (#29082)
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2026-06-23 14:57:35 -07:00 |
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Liangsheng Yin
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c864c8d9c2
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[misc] Move bench_one_batch into sglang/benchmark/ with a back-compat shim (#28687)
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2026-06-23 14:48:35 -07:00 |
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cctryandcctry
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0c065671c9
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[Spec] Redo: split init_backends; account draft weights in --mem-fraction-static (#28855)
Co-authored-by: cctry <cctry@fb.com>
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2026-06-21 20:45:16 -07:00 |
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Lianmin Zheng
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7942d546d1
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Revert "[Spec] Split init_backends; account draft weights in --mem-fraction-static" (#28841)
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2026-06-21 07:52:35 -07:00 |
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cctry
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9691a29fe0
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[Spec] Split init_backends; account draft weights in --mem-fraction-static (#28683)
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2026-06-21 01:22:26 -07:00 |
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Polisetty V R K Jyothendra Varma
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fbbf559de2
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fix bench_one_batch by extending array with array not list (#28732)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
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2026-06-21 08:28:41 +08:00 |
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Liangsheng Yin
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b88bada64e
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[misc] Unify bench seed default to 42 and rename --profile-filename-prefix to --profile-prefix (#28576)
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2026-06-17 16:41:23 -07:00 |
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cctry
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75998d0421
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Fix --mem-fraction-static not accounting for EAGLE draft model KV cache (#23862)
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2026-06-12 10:35:48 -07:00 |
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2495c02c2c
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[Refactor] Cuda Graph Runner/Backend Refactor (#23906)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-06-09 21:36:57 -07:00 |
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c2eae96c56
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MSCCL++ Integration (#22734)
Co-authored-by: Caio Rocha <caiorocha@microsof.com>
Co-authored-by: empyreus <rjsouza1995@gmail.com>
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2026-06-08 21:13:13 -07:00 |
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fzyzcjy
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259a2da3e0
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Refactor Req.fill_ids into full_untruncated_fill_ids + fill_len with equivalence (#26637)
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2026-06-08 14:52:18 +08:00 |
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Mohammad Miadh AngkadandLianmin Zheng
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52f221cce0
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Fix Req array token-id concatenation (#26182)
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-06-06 19:59:51 -07:00 |
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MingxuZh
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b678448b8a
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ci(xeon): merge 2 partitions into 1 job to reduce runner contention (#26904)
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2026-06-03 09:46:27 +08:00 |
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Chandrakant Khandelwal
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61cc70e8aa
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Fixed incorrect indexing for slot 0 compatibility (#26481)
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2026-06-01 10:46:21 +08:00 |
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a952e9174f
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[MLX] Support Qwen3.5 (dense) Model (#25754)
Signed-off-by: Xiaodong Ye <yeahdongcn@gmail.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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2026-05-30 17:05:02 +08:00 |
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chenxb002andkjuuii
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8652001b6a
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fix: use req.req_pool_idx instead of loop variable for req_to_token i… (#26534)
Co-authored-by: kjuuii <1375341936@qq.com>
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2026-05-29 02:34:42 -07:00 |
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Liangsheng Yin
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7f154ba449
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drop output ids (#25774)
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2026-05-19 17:50:47 -07:00 |
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fzyzcjy
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4d6eec7b32
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Move DP-attention adapter methods to SchedulerDPAttnAdapter (#25612)
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2026-05-18 18:32:16 +08:00 |
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Xia WeiwenandMa Mingfei
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8d5ed330cc
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[XPU] Enable qwen3.5 on XPU (#21668)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-05-18 14:59:19 +08:00 |
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Liangsheng Yin
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58ece60703
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refactor: remove ModelWorkerBatch indirection (#25516)
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2026-05-17 18:05:39 -07:00 |
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Le ZhangandClaude Opus 4.7
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3fc60e5748
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[MLX] bench_one_batch: thread --quantization through to MlxModelRunner (#25221)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-14 09:56:42 -07:00 |
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Cheng WanandClaude Opus 4.7
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f2a90094c9
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bench: fix wrong flag names in bench_one_batch{,_server} docstrings (#25143)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-12 23:46:47 -07:00 |
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R0CKSTAR
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26ae7b8bd7
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[MLX] Support radix cache (#21509)
Signed-off-by: Xiaodong Ye <yeahdongcn@gmail.com>
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2026-04-18 07:00:50 +08:00 |
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Jonah Bernard
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8216b921a1
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Add MLX profiling to bench_one_batch.py (#22159)
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2026-04-09 20:45:21 +08:00 |
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lviy
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5f0df1e2ad
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[Bugfix] Fix incorrect dp-attention parallel info in bench_one_batch (#21519)
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2026-04-02 20:13:53 -07:00 |
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R0CKSTAR
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a305964159
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[MLX] Add native MLX execution backend for Apple Silicon Mac (#20342)
Signed-off-by: Xiaodong Ye <yeahdongcn@gmail.com>
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2026-03-26 00:09:17 -07:00 |
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gaopengff
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f4393bf3f6
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Fix correctness test issue for bench_one_batch (#20650)
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2026-03-15 20:05:36 -07:00 |
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Kalyan Kumarandgemini-code-assist[bot]
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c1df359b44
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Add XPU profiler activity support in benchmark code (#12981)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-03-04 23:22:56 -08:00 |
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b8zhongandVincent Zhong
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4df74eb576
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[Refactor] Add -fp4-gemm-backend to replace SGLANG_FLASHINFER_FP4_GEMM_BACKEND (#16534)
Co-authored-by: Vincent Zhong <207368749+vincentzed@users.noreply.github.com>
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2026-01-18 23:25:46 +08:00 |
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Lingjun WenandXinyuan Tong
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7f8353aff3
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[BugFix]: Fix sglang.bench_one_batch (#16925)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-01-16 13:15:34 -08:00 |
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Ke Bao
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7f8a58fffb
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Refactor prefix cache type checking (#17028)
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2026-01-15 11:28:13 +08:00 |
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Cheng Wan
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60f1ca6925
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Refactor: Moving extend_logprob_start_len calculation out of prepare_for_extend (#16105)
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2025-12-30 12:38:33 +08:00 |
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Cheng Wan
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6f9d0a89a0
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[scheduler] fix: correcting extend_logprob_start_len calculation (#15922)
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2025-12-28 14:57:04 -08:00 |
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fzyzcjy
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ad9616f13a
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Tiny extract ModelRunnerOutput (#15400)
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2025-12-18 22:18:45 +08:00 |
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b8zhong
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55504df2f7
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Add FP8 Blockwise GEMM Backend Flag --fp8-gemm-backend (#14379)
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2025-12-09 12:05:56 -08:00 |
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Liangsheng Yin
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243ea585fc
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[DP-Attn] Clarify MLP sync / idle batch preparation logic (#12843)
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2025-11-08 23:23:14 +08:00 |
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fzyzcjy
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c9db79117f
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Super tiny fix naming in bench serving scripts (#12515)
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2025-11-02 12:43:10 -08:00 |
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lpc0220
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6c1a3f0cb2
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enable cudaProfilerApi for one batch benchmarking (#11116)
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2025-10-30 15:43:59 -07:00 |
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b113c72e7a
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Init attention backend for Intel XPU (#10656)
Co-authored-by: guangyey <guangye.yu@intel.com>
Co-authored-by: DiweiSun <105627594+DiweiSun@users.noreply.github.com>
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2025-10-21 11:41:28 +08:00 |
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Zilin Zhu
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e68a2b5b2f
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[RL] use cpu group to prepare_mlp_sync_batch_raw when the server is offloaded (#10152)
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2025-10-18 14:29:35 +08:00 |
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Cheng Wan
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5b214b50b6
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[Refactor] move deep_gemm_wrapper out of quantization (#11784)
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2025-10-17 18:57:54 -07:00 |
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9eefe2c0b7
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Set CUDA_VISIBLE_DEVICES to achieve one GPU per process (#9170)
Co-authored-by: SangBin Cho <rkooo567@gmail.com>
Co-authored-by: Cheng Wan <cwan@x.ai>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
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2025-10-17 17:30:06 -07:00 |
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Huaiyu, Zheng
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729b7edf72
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enable rmsnorm on XPU (#10248)
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2025-10-15 17:54:18 -07:00 |
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cctry
|
b36afed4a7
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Separate allocation logic from scheduler (#11313)
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2025-10-10 17:38:54 -07:00 |
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Yingchun Lai
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0fe87213bb
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fix: fix gpu-proc affinity set incorrectly when pp_size > 1 (#11389)
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2025-10-09 18:40:05 -07:00 |
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cctry
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f3764c26a3
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Clean match_prefix and prepare_for_extend for mem cache V2 (#11200)
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2025-10-07 17:54:18 -07:00 |
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fzyzcjy
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fdc4e1e570
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Tiny move files to utils folder (#11166)
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2025-10-03 22:40:06 +08:00 |
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Mick
|
777eb53897
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ci: refactor nightly test (#10495)
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2025-09-26 15:24:30 -07:00 |
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