Liangsheng Yin
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c0480a88be
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[Spec] Retire Spec V1 (#27964)
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2026-06-11 16:15:15 -07:00 |
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Oguz Ulgen
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949326d922
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Add SGLANG_ENABLE_WAR_BARRIER to force-enable the overlap scheduler WAR barrier on non-CUDA (e.g. AMD) (#27967)
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2026-06-11 15:38:37 -07:00 |
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 Brayden ZhongandBrayden Zhong
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493f828bfa
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Add DeepGEMM prerelease wheel tests (#27075)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-06-11 15:14:50 -07:00 |
|
 
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d71e9bede6
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[bugfix] commit Mamba states after NGRAM target verify (#26351)
Co-authored-by: xbfs <xuebf1@lenovo.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-06-11 15:11:18 -07:00 |
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Yueming Yuan
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cd075d1f64
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[RL] convert DeepSeek V4 APE layout through weight loader (#27307)
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2026-06-11 15:05:27 -07:00 |
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Trevor Morris
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0bac184425
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[NVIDIA] Update Minimax-M2.5,M2.7 docs with flags for performance (#24465)
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2026-06-11 14:58:44 -07:00 |
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Liangsheng Yin
|
fee717f303
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[Spec] Fold the DFLASH worker base into DFlashWorkerV2 on BaseSpecWorker (#27950)
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2026-06-11 14:54:28 -07:00 |
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Liangsheng Yin
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acdb39edd2
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[Spec] Remove the DFLASH V1 worker path (#27959)
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2026-06-11 14:37:58 -07:00 |
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Wang, FangYuan
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6e885c844f
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Revert "[AMD] Fix DeepSeek V4 Pro c128 state tensor dtype mismatch error and c4_sparse_raw_indices attribute error in cuda graph phase" (#27919)
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2026-06-11 14:25:32 -07:00 |
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Michael
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12d3f02be8
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[AMD] Fix DSA device-to-host direct test on rocm720 (page_size%16 assert) (#27850)
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2026-06-11 14:24:23 -07:00 |
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Liangsheng Yin
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df5055e00f
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Bump spec logprob match delta for the bf16 eagle fixture (#27952)
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2026-06-11 14:21:07 -07:00 |
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Liangsheng Yin
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1ac75c3463
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[CI] Fix GB300 TestDummyWithSBO crash: disable NaN assert and coredump for dummy weights (#27955)
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2026-06-11 14:17:03 -07:00 |
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Baizhou Zhang
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d26b90cf70
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Add weireweire to CI permissions (#27957)
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2026-06-11 14:10:45 -07:00 |
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  ![github-actions[bot]](/assets/img/avatar_default.png)
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ec0eb6cce8
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Support MiMo v2 ASR (#26278)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: yanyihan <yanyihan@xiaomi.com>
Co-authored-by: zhuqingchao <zhuqingchao@xiaomi.com>
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2026-06-11 13:43:13 -07:00 |
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Jackey Hua
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24c5d76f74
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fix: per-sequence last-token embedding in EAGLE3/MTP draft for batched multimodal spec decoding (#27846)
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2026-06-11 13:33:16 -07:00 |
|
 cctryandcctry
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10219bd9d6
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[PD] Fix negative prefill kv_transfer_alloc_ms under optimistic prefill (#27885)
Co-authored-by: cctry <cctry@fb.com>
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2026-06-11 13:12:25 -07:00 |
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Yuwei An
|
880e6f66fc
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[BCG] Share output buffers across capture sizes + typed ShapeKey (#27857)
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2026-06-11 11:58:05 -07:00 |
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Brian Chao
|
7f57b344c9
|
[diffusion] feat: progressive resolution growing for Ideogram 4 via GPU DCT upsampling with up to 1.56× speedup (#27736)
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2026-06-11 23:16:53 +08:00 |
|
 Chi McIsaacandMick
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b2728bda9d
|
[diffusion] feat: use fused w8a8 kernel for Ideogram4 weight-only linear as an opt-in (#27590)
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-06-11 23:15:27 +08:00 |
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 Xiaoyu ZhangandBBuf
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06e0df5899
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Optimize Qwen3 Next FP8 MoE on H200 (#26204)
Co-authored-by: BBuf <xiaoyu.zhang@radixark.net>
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2026-06-11 22:18:43 +08:00 |
|
 Xiaoyu ZhangandBBuf
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1a6b5561db
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Fix MLA scaling when YARN scaling is disabled (#26203)
Co-authored-by: BBuf <xiaoyu.zhang@radixark.net>
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2026-06-11 22:17:55 +08:00 |
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Xiaoyu Zhang
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d571e076fa
|
[codex] Centralize more inline Triton kernels (#27429)
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2026-06-11 22:17:26 +08:00 |
|
Mick
|
d9110d971e
|
[diffusion] fix: fix wan ti2v sp timestep padding (#27876)
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2026-06-11 22:13:25 +08:00 |
|
ybyang
|
8077fb1df7
|
fix(deepgemm): align PP-parallel warmup bs to CP padding (#27922)
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2026-06-11 20:52:45 +08:00 |
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Mick
|
9e9fde1478
|
[diffusion] Revert "Mistral3 add tensor parallel support for diffusion text encoder " (#27892)
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2026-06-11 20:33:45 +08:00 |
|
 Shangming CaiandAbatom
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6a012fbb2d
|
[PD] Fix ZMQ stale socket reconnection in PD disaggregation (#27796)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Abatom <abzhonghua@gmail.com>
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2026-06-11 19:51:12 +08:00 |
|
 shuwennandClaude Opus 4.8
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66076f2409
|
[mem_cache][3/N] refactor: move HiSparse allocators to allocator/hisparse.py (#26678)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-06-11 19:50:24 +08:00 |
|
Zhonghua Deng
|
be45745f38
|
[EPD] fix: zmq PUSH socket reconnect-aware connection management with tcp keepalive (#27039)
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2026-06-11 19:32:31 +08:00 |
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Mohammad Miadh Angkad
|
7e245afefe
|
[CI] Fix registered sigmoid gate mul test location (#27909)
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2026-06-11 18:52:37 +08:00 |
|
Mohammad Miadh Angkad
|
6ac9f66596
|
Remove MoE prefill CUDA graph disable guard (#27841)
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2026-06-11 18:30:15 +08:00 |
|
luoroger37
|
54cba63b6c
|
Fix paged SWA free mapping cleanup (#27779)
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2026-06-11 18:25:24 +08:00 |
|
jacky.cheng
|
22c7285a26
|
[AMD] Fuse sigmoid + mul attention output gate into single Triton kernel (#27630)
|
2026-06-11 02:05:05 -07:00 |
|
jacky.cheng
|
f4b3b99413
|
[AMD] Enable fused GDN QKV split Triton kernel on HIP (#27583)
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2026-06-11 02:01:27 -07:00 |
|
Liangsheng Yin
|
493bb6ae0d
|
Fix fp16 NaN flake in spec CI: bf16 eagle fixture; sanitize NaN logits in sampler (#27883)
|
2026-06-11 01:16:12 -07:00 |
|
 kkandwunhuang
|
b8376aebd0
|
[AMD] Fix the dsv4 performance of MoE issue. (#27858)
Co-authored-by: wunhuang <wunhuang@amd.com>
|
2026-06-11 01:06:54 -07:00 |
|
ashwini rathi
|
2a51479a91
|
ci(xpu): pull intel/sglang-dev:latest and clean workspace properly (#27860)
|
2026-06-11 13:14:56 +08:00 |
|
Vinay Kumar
|
57907cff97
|
docker(xeon): support running container as non-root user (#27157)
|
2026-06-11 12:26:26 +08:00 |
|
gaopengff
|
dc1e46ec8f
|
[Intel GPU]Add sycl mrope pass for xpu device (#27646)
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2026-06-11 12:25:55 +08:00 |
|
Cheng Wan
|
9425ba2478
|
Remove extra_pytest_path from pr-test.yml (#27856)
|
2026-06-10 21:16:14 -07:00 |
|
Zhangheng
|
5e0271536a
|
[UnifiedTree]: HybridModel launches HiCache via UnifiedTree by default. (#27759)
|
2026-06-11 12:03:36 +08:00 |
|
Zilin Zhu
|
9788c8e867
|
[RL] Handle Mooncake buffers across memory release (#27696)
|
2026-06-11 11:15:00 +08:00 |
|
YAMY
|
f8b0a120b8
|
fix: DSV4 BCG compress-prefill plan OOB on underfilled (tiny) prefill replay (#27747)
|
2026-06-10 20:02:24 -07:00 |
|
Cheng Wan
|
f4f30d7d23
|
[Fix] Use int64 seq_lens across all CUDA graph runners and backends (#27840)
|
2026-06-10 19:54:58 -07:00 |
|
Yihao Wang
|
b4bed8c398
|
[diffusion] fix: cast to float32 (from float64) in triton kernel to unblock torch.compile (#27709)
|
2026-06-11 10:29:21 +08:00 |
|
David Wang
|
588d1f7bc9
|
[Feature] Spec V2 DFlash Support (#23000)
|
2026-06-10 19:27:42 -07:00 |
|
ming_wang
|
ce0ff154a5
|
add mimo best practice (#27665)
|
2026-06-11 10:15:31 +08:00 |
|
Hexq0210
|
475e9d25bf
|
bugfix for npu mtp graph runner (#27808)
|
2026-06-11 10:09:50 +08:00 |
|
amote-i
|
fc1fee528c
|
[NPU] [DOC] replace <code> with backticks and remove obsolete params (#27677)
|
2026-06-11 09:33:31 +08:00 |
|
 zijiexiaandClaude Fable 5
|
43835b5ba5
|
docs: cookbook benchmark accuracy labels come from the model config (no engine default) (#27842)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-06-10 18:27:38 -07:00 |
|
YanbingJiang
|
66989a7642
|
Fix gpt-oss-20b with mxfp4 support for Xeon (#27782)
|
2026-06-11 09:16:16 +08:00 |
|