 Bi Xueandispobock
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3c1f9eafa5
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[sgl] proactively release out-of-window SWA slots after chunked prefill (#27402)
Co-authored-by: ispobock <ispobaoke@gmail.com>
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2026-06-12 14:17:18 +08:00 |
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Xinyi SongandThomas Wang
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36d61613a1
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[AMD] Cache unified_kv swa_loc once per step instead of per layer (#27978)
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
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2026-06-11 23:13:15 -07:00 |
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Jumiar
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ca17bd8347
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perf: eliminate CUDA syncs in VLM embed path (#26082)
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2026-06-12 13:15:56 +08:00 |
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Mick
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8038806557
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[diffusion] optimize: optimize flux1 tensor parallel sharding (#27826)
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2026-06-12 13:13:18 +08:00 |
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0a1fb0da86
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add LRU eviction for mooncacke embedding cache (#25954)
Signed-off-by: Michael Qiu <qiudayu.qdy@antgroup.com>
Co-authored-by: Mike_Qiu <qiudayu.qdy@antgroup.com>
Co-authored-by: siyu <liusy58@linux.alibaba.com>
Co-authored-by: Yuang Chen <1131578721@qq.com>
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2026-06-12 12:38:13 +08:00 |
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Liangsheng Yin
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e1164a6dfc
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[Spec] Remove dead prepare_for_verify / prepare_extend_after_decode + extend-decode kernel (#27761)
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2026-06-11 20:59:30 -07:00 |
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syy-hw
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3a3a759464
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[NPU] Add Gemma4 Sliding Window Attention support on Ascend backend (#26147)
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2026-06-12 11:44:38 +08:00 |
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Brayden ZhongandBrayden Zhong
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8bfcc0c39c
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Use the correct wrapper for fp4_quantize (#27956)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-06-11 20:23:09 -07:00 |
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Yihao Wang
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f5c9f88ee2
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[plugin][distributed] use active platform's backend in get_default_distributed_backend (#23969)
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2026-06-11 20:05:17 -07:00 |
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7074704c0c
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[Spec] Dedup post-verify mamba state commit into shared spec_utils helpers (#27966)
Co-authored-by: xbfs <xuebf1@lenovo.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-06-11 18:33:40 -07:00 |
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Liangsheng Yin
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3ffe72517f
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[Spec] Remove the dead spec V1 scheduler paths (#27977)
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2026-06-11 18:31:13 -07:00 |
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Cheng Wan
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2e74ff192c
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[DSV4] Use int64 for compressor out_loc tensors (#27973)
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2026-06-11 17:45:34 -07:00 |
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Cheng Wan
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97a0031799
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[lint] Enable Ruff UP037 to drop redundant quoted annotations (#27984)
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2026-06-11 17:38:05 -07:00 |
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Liangsheng Yin
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c0480a88be
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[Spec] Retire Spec V1 (#27964)
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2026-06-11 16:15:15 -07:00 |
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Oguz Ulgen
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949326d922
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Add SGLANG_ENABLE_WAR_BARRIER to force-enable the overlap scheduler WAR barrier on non-CUDA (e.g. AMD) (#27967)
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2026-06-11 15:38:37 -07:00 |
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d71e9bede6
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[bugfix] commit Mamba states after NGRAM target verify (#26351)
Co-authored-by: xbfs <xuebf1@lenovo.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-06-11 15:11:18 -07:00 |
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Yueming Yuan
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cd075d1f64
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[RL] convert DeepSeek V4 APE layout through weight loader (#27307)
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2026-06-11 15:05:27 -07:00 |
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Liangsheng Yin
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fee717f303
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[Spec] Fold the DFLASH worker base into DFlashWorkerV2 on BaseSpecWorker (#27950)
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2026-06-11 14:54:28 -07:00 |
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Liangsheng Yin
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acdb39edd2
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[Spec] Remove the DFLASH V1 worker path (#27959)
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2026-06-11 14:37:58 -07:00 |
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Wang, FangYuan
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6e885c844f
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Revert "[AMD] Fix DeepSeek V4 Pro c128 state tensor dtype mismatch error and c4_sparse_raw_indices attribute error in cuda graph phase" (#27919)
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2026-06-11 14:25:32 -07:00 |
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Liangsheng Yin
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df5055e00f
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Bump spec logprob match delta for the bf16 eagle fixture (#27952)
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2026-06-11 14:21:07 -07:00 |
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ec0eb6cce8
|
Support MiMo v2 ASR (#26278)
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: yanyihan <yanyihan@xiaomi.com>
Co-authored-by: zhuqingchao <zhuqingchao@xiaomi.com>
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2026-06-11 13:43:13 -07:00 |
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Jackey Hua
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24c5d76f74
|
fix: per-sequence last-token embedding in EAGLE3/MTP draft for batched multimodal spec decoding (#27846)
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2026-06-11 13:33:16 -07:00 |
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cctryandcctry
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10219bd9d6
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[PD] Fix negative prefill kv_transfer_alloc_ms under optimistic prefill (#27885)
Co-authored-by: cctry <cctry@fb.com>
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2026-06-11 13:12:25 -07:00 |
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Yuwei An
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880e6f66fc
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[BCG] Share output buffers across capture sizes + typed ShapeKey (#27857)
|
2026-06-11 11:58:05 -07:00 |
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Brian Chao
|
7f57b344c9
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[diffusion] feat: progressive resolution growing for Ideogram 4 via GPU DCT upsampling with up to 1.56× speedup (#27736)
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2026-06-11 23:16:53 +08:00 |
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Chi McIsaacandMick
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b2728bda9d
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[diffusion] feat: use fused w8a8 kernel for Ideogram4 weight-only linear as an opt-in (#27590)
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-06-11 23:15:27 +08:00 |
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Xiaoyu ZhangandBBuf
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06e0df5899
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Optimize Qwen3 Next FP8 MoE on H200 (#26204)
Co-authored-by: BBuf <xiaoyu.zhang@radixark.net>
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2026-06-11 22:18:43 +08:00 |
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Xiaoyu ZhangandBBuf
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1a6b5561db
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Fix MLA scaling when YARN scaling is disabled (#26203)
Co-authored-by: BBuf <xiaoyu.zhang@radixark.net>
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2026-06-11 22:17:55 +08:00 |
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Xiaoyu Zhang
|
d571e076fa
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[codex] Centralize more inline Triton kernels (#27429)
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2026-06-11 22:17:26 +08:00 |
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Mick
|
d9110d971e
|
[diffusion] fix: fix wan ti2v sp timestep padding (#27876)
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2026-06-11 22:13:25 +08:00 |
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ybyang
|
8077fb1df7
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fix(deepgemm): align PP-parallel warmup bs to CP padding (#27922)
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2026-06-11 20:52:45 +08:00 |
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Mick
|
9e9fde1478
|
[diffusion] Revert "Mistral3 add tensor parallel support for diffusion text encoder " (#27892)
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2026-06-11 20:33:45 +08:00 |
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Shangming CaiandAbatom
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6a012fbb2d
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[PD] Fix ZMQ stale socket reconnection in PD disaggregation (#27796)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Abatom <abzhonghua@gmail.com>
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2026-06-11 19:51:12 +08:00 |
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shuwennandClaude Opus 4.8
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66076f2409
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[mem_cache][3/N] refactor: move HiSparse allocators to allocator/hisparse.py (#26678)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-06-11 19:50:24 +08:00 |
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Zhonghua Deng
|
be45745f38
|
[EPD] fix: zmq PUSH socket reconnect-aware connection management with tcp keepalive (#27039)
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2026-06-11 19:32:31 +08:00 |
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Mohammad Miadh Angkad
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7e245afefe
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[CI] Fix registered sigmoid gate mul test location (#27909)
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2026-06-11 18:52:37 +08:00 |
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Mohammad Miadh Angkad
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6ac9f66596
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Remove MoE prefill CUDA graph disable guard (#27841)
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2026-06-11 18:30:15 +08:00 |
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luoroger37
|
54cba63b6c
|
Fix paged SWA free mapping cleanup (#27779)
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2026-06-11 18:25:24 +08:00 |
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jacky.cheng
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22c7285a26
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[AMD] Fuse sigmoid + mul attention output gate into single Triton kernel (#27630)
|
2026-06-11 02:05:05 -07:00 |
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jacky.cheng
|
f4b3b99413
|
[AMD] Enable fused GDN QKV split Triton kernel on HIP (#27583)
|
2026-06-11 02:01:27 -07:00 |
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Liangsheng Yin
|
493bb6ae0d
|
Fix fp16 NaN flake in spec CI: bf16 eagle fixture; sanitize NaN logits in sampler (#27883)
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2026-06-11 01:16:12 -07:00 |
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kkandwunhuang
|
b8376aebd0
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[AMD] Fix the dsv4 performance of MoE issue. (#27858)
Co-authored-by: wunhuang <wunhuang@amd.com>
|
2026-06-11 01:06:54 -07:00 |
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gaopengff
|
dc1e46ec8f
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[Intel GPU]Add sycl mrope pass for xpu device (#27646)
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2026-06-11 12:25:55 +08:00 |
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Zhangheng
|
5e0271536a
|
[UnifiedTree]: HybridModel launches HiCache via UnifiedTree by default. (#27759)
|
2026-06-11 12:03:36 +08:00 |
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Zilin Zhu
|
9788c8e867
|
[RL] Handle Mooncake buffers across memory release (#27696)
|
2026-06-11 11:15:00 +08:00 |
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|
YAMY
|
f8b0a120b8
|
fix: DSV4 BCG compress-prefill plan OOB on underfilled (tiny) prefill replay (#27747)
|
2026-06-10 20:02:24 -07:00 |
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|
Cheng Wan
|
f4f30d7d23
|
[Fix] Use int64 seq_lens across all CUDA graph runners and backends (#27840)
|
2026-06-10 19:54:58 -07:00 |
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Yihao Wang
|
b4bed8c398
|
[diffusion] fix: cast to float32 (from float64) in triton kernel to unblock torch.compile (#27709)
|
2026-06-11 10:29:21 +08:00 |
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|
David Wang
|
588d1f7bc9
|
[Feature] Spec V2 DFlash Support (#23000)
|
2026-06-10 19:27:42 -07:00 |
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