Commit Graph
2655 Commits
Author SHA1 Message Date
weireweireandZhangheng 034dd39189 Support KV events for UnifiedRadixCache (#26387)
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-05-27 22:10:40 +08:00
Jialin Ouyang 98bc6f3c22 API Perf: Replace pydantic per-element validation with C loop validation (#26355) 2026-05-27 02:04:07 -07:00
Jacob0226 d44584e8d8 [AMD] [CI] Add GLM-5.1 MXFP4 TP2 accuracy gate (#26396) 2026-05-27 01:49:48 -07:00
Jacob0226andCursor bf5bc23431 [AMD] [CI] Add DeepSeek-R1-0528 FP8 HiCache GSM8K test on MI35x (#26395)
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-05-27 01:48:38 -07:00
d45ee3f6c5 [HiCache] fix: Mooncake Dummy Client mode for hybrid Mamba models (#25278)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: Teng Ma <stmatengss@users.noreply.github.com>
2026-05-27 10:29:52 +08:00
vikram singh shekhawatandMa Mingfei 737c6cd6d1 [XPU] Add registry mechanism for XPU CI tests (#25405)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-05-27 08:56:59 +08:00
Joel Schlosser 6989fede3c Purge usage of pytorch named tensors (#25911) 2026-05-26 14:58:57 -07:00
Ziang Li 2b1e53c98d [RL] Fix FP8 skip matching for trailing-dot prefixes (#26287) 2026-05-26 20:30:08 +00:00
Liangsheng Yin ec6f8d61f7 [Spec] Async-assert probes across EAGLE/MTP; zero tgt_cache_loc (#26335) 2026-05-26 11:34:03 -07:00
Zhangheng 38f32c38ab [UnifiedRadixTree]: Support L3 HiStorage framework (#26062) 2026-05-26 22:38:00 +08:00
Jun Liu c47f0e7cdd [PD] Fix top logprobs crash in prefill path (#26299) 2026-05-26 22:01:10 +08:00
roikoren755 e958f4561f [feat] Support extra_buffer in Mamba2-based models (#15829)
Signed-off-by: Roi Koren <roik@nvidia.com>
2026-05-26 16:03:29 +08:00
Liangsheng Yin 7e6e5efe51 Revert "fix(tool_call): normalize non-standard JSON Schema types in tool params" (#26379) 2026-05-26 00:49:41 -07:00
Yuan Luoandluoyuan.luo d34d4d9f5f [GDN] Support SM100 CuTeDSL GDN Prefill Kernel (#26200)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2026-05-26 15:38:29 +08:00
Xinyuan Tong 64c7c6851b fix(tool_call): normalize non-standard JSON Schema types in tool params (#23476) 2026-05-26 15:23:59 +08:00
+2 3f5e2c7688 [AMD] Dsv4/pr2 compressor opt (#26208)
Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Lin, Soga <soga.lin@amd.com>
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
Co-authored-by: yichiche@amd.com <jacky.cheng>
Co-authored-by: yctseng0211 <yctseng@amd.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
2026-05-25 23:54:40 -07:00
mispa-msandMick 3142278c5f [diffusion] feat: layerwise NVTX markers for Nsight Systems profiling (#25683)
Co-authored-by: Mick <mickjagger19@icloud.com>
2026-05-26 11:24:27 +08:00
Ziang Li 2b9dd9c8b3 [FlashInfer v0.6.10] [RL] [DSv32] [GLM-5] Add --dsa-topk-backend and integrate FlashInfer and pytorch topk (#22851) 2026-05-25 13:08:03 -07:00
Ke Bao b13d3d18c6 Refactor HiCache stack dispatch into strategies (#26295) 2026-05-26 00:06:17 +08:00
Shangming Cai 2aa6995308 [CI] Enable EPD CI for EPD architecture enhancements (#26281) 2026-05-25 23:52:58 +08:00
Shangming Cai bc8d64bf36 [CI] Align score threshold in dsv4 disaggregation test (#26268) 2026-05-25 17:48:45 +08:00
Erik Wijmans 87e69d57c4 [lora] Fix overlap loading for cancelled requests (#25413) 2026-05-25 15:18:36 +09:00
Xia WeiwenandMa Mingfei 2bd3ac0b5d [XPU] fix correctness issue of GDN triton kernel for XPU (#26065)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-05-25 13:18:11 +08:00
Ethan ZHUandZhangheng e86fdf3a3c [Bug Fix][HiCache] TreeNode.get_prefix_hash_values @lru_cache can return mutated list (#26177)
Co-authored-by: Zhangheng <hzh0425@apache.org>
2026-05-25 11:15:10 +08:00
Ma Mingfei 821d5f4a5b [CPU] add faster KV-cache writes (#25874) 2026-05-25 10:28:52 +08:00
Liangsheng Yin d7e3e54148 [Test] split test/registered/distributed/ into topic folders (#26240) 2026-05-24 17:02:07 -07:00
Liangsheng Yin 030bd5d3ed [Test] test_session_latency: assert streaming tail/head stability (#26230) 2026-05-24 14:06:41 -07:00
shuwenn 36eb72bf12 [UnifiedTree] fix: backup SWA-split parent before child under write-through (#25065) 2026-05-25 00:21:57 +08:00
Dongjun Na 9d50cd9742 [observability] add ServerArgs.stat_loggers for pluggable metrics backend (#24610)
Signed-off-by: Dongjun Na <kmu5544616@gmail.com>
2026-05-24 22:41:28 +08:00
Mick b6f71d5850 [VLM] avoid extra cuda-ipc staging for preprocessed input (#26096) 2026-05-24 19:48:06 +08:00
Khoa PhamandClaude Opus 4.7 b0ce16d0c5 [CP] 1/N: Support MLA Prefill Context Parallel (#23292)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-23 03:07:09 -07:00
liuxianglong17 8c78424701 Reduce excessively long logs caused by transformer version updates. (#26033) 2026-05-23 17:12:08 +08:00
Baizhou Zhangandyhyang201 7b7f1067bd Add non-MTP DSV4 test coverage (#26141)
Co-authored-by: yhyang201 <yhyang201@gmail.com>
2026-05-22 19:43:17 -07:00
weireweire 629b6c6a85 correct allreduce fusion and dummy_run alignment in SCATTERED MLP mode (moe_dense_tp_size=1) (#19918) 2026-05-22 19:18:25 -07:00
nvjullin cadfa2d025 Support piecewise CUDA graph with NSA (#23351) 2026-05-22 14:39:50 -07:00
Kangyan-ZhouandClaude Opus 4.7 085777210c feat(kv-events): expose structured KV-event publisher block on /server_info (#25844)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-05-23 01:59:45 +08:00
Jialin Ouyangandjialino 06c23d55b5 perf: migrate Req token-id storage to array.array('q') in Scheduler (#25098)
Co-authored-by: jialino <jialino@fb.com>
2026-05-22 10:51:07 -07:00
zhangtao2-1andzhangtao 6baa859a86 Add MiniCPM5 tool call parser for XML-style function calls (#25600)
Co-authored-by: zhangtao <zhangtao2@modelbest.cn>
2026-05-22 23:09:40 +08:00
Cheng WanandClaude Sonnet 4.6 d765dfd043 refactor(attn): init hisparse_coordinator before attn_backend; replace lazy property with init-time capture (#26012)
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
2026-05-21 16:03:42 -07:00
Cheng WanandClaude Sonnet 4.6 c5251a98a9 feat(model_runner): remove pool/backend refs from ForwardBatch via ForwardContext (#25983)
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
2026-05-21 14:01:49 -07:00
Shangming Cai fbebdd5105 [CI] Enable nixl disaggregation test for decode radix cache (#25990) 2026-05-21 19:29:24 +08:00
Xinyuan Tong 40faf44f7a [auto-detect] match Ring-2.6/Ling XML kv tool-call format via vocab signature (#25366) 2026-05-20 23:34:52 -07:00
Bingxu ChenandCursor Agent 45cadc215f [AMD][CI] Clean up AMD nightly + pr-test workflows (#25266)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
2026-05-20 23:30:26 -07:00
Cheng WanandClaude Sonnet 4.6 888a8794ef [Fix] DSV4 cached_loc invalidated when SWA mapping is rebuilt (#25889)
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
2026-05-20 22:38:12 -07:00
84ea47eb22 [CPU] Fix issues when running llama3.2-11B vision model with image tasks (#8666)
Co-authored-by: JieXin Liang <Alcanderian@users.noreply.github.com>
Co-authored-by: Yineng Zhang <me@zhyncs.com>
Co-authored-by: jianan-gu <jianan.gu@intel.com>
2026-05-21 13:09:18 +08:00
Cheng WanandClaude Sonnet 4.6 79b937aefb [Refactor] Encapsulate SWA loc translation inside SWAKVPool with per-batch cache invalidation (#25824)
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
2026-05-20 21:26:32 -07:00
YC Yen-Ching Tseng 90efa9c83f [AMD] Fix AMD stage-a-test-small-1-gpu (#25932) 2026-05-20 20:51:49 -07:00
Randall LinandCursor 791a2f057f Add overridable hooks for custom chat serving implementations (#25807)
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-05-21 11:21:25 +08:00
Kevin Flansburg 643d44d699 [BugFix] fix(hicache): fix two slot-reuse races in DecodeKVCacheOffloadManager (#24226) 2026-05-20 18:20:19 -07:00
Yuzhen Zhou dac78768f0 [RL][TITO] Preserve whitespace in reasoning parser outputs (#24251) 2026-05-20 19:45:09 +00:00