 Xinyuan Tongandhnyls2002
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85cdf1178d
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[CI] Prune redundant CPU test overhead (#34309)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
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2026-08-13 19:51:17 -07:00 |
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Yuhao YangandClaude
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6ad3f2d8fd
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docs: link dots3.note checkpoints, add H100 cells (#34797)
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-14 02:42:27 +00:00 |
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ashwini rathiandarathi-hlab
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456c5551cc
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[XPU][test] Add cache_salt=None to _make_req in test_lmcache_radix_cache.py (#34728)
Co-authored-by: arathi-hlab <arathi.hlab@users.noreply.github.com>
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2026-08-14 10:27:15 +08:00 |
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SII-yangdianandSII-yangdian
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f2b2b567aa
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perf(jit_kernel/deepseek_v4): optimize paged_mqa_metadata (#25855)
Co-authored-by: SII-yangdian <yangdian@sii.edu.cn>
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2026-08-13 19:00:22 -07:00 |
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Xiaoyu ZhangandClaude Fable 5
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704e512836
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[GDN] Honor configured linear-attn verify backend in the kernel dispatcher (#34592)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-14 08:59:52 +08:00 |
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Michael
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34219ed9a7
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[AMD] CI: pin antlr4-python3-runtime back after lmms-eval (unblocks ROCm 7.2 stage-b evals) (#34768)
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2026-08-14 08:41:16 +08:00 |
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Ziang Li
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9d34c2809f
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[FlashInfer v0.6.16] Support FlashInfer CuTe DSL NVFP4 MoE quantization (#28354)
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2026-08-13 17:33:46 -07:00 |
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ormandj
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c4271c3fe1
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[DSpark] Fix EP1 decode performance regression (#34759)
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2026-08-13 17:00:54 -07:00 |
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weireweireandweireweire
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54c44fef73
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[Perf] Skip trivial DSV4 nonpaged indexer logits (#33857)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-08-13 16:21:30 -07:00 |
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Liangsheng Yin
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151a314829
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[Fix] Make the DSpark draft num_token_non_padded host-to-device copy non-blocking (#34782)
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2026-08-13 16:10:54 -07:00 |
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zijiexia
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abdef3c38e
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[Qwen] Update Docker image tag for MI300X to v0.5.17-rocm700-mi30x-20… (#34770)
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2026-08-13 15:59:42 -07:00 |
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MichaelandMichael
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9720922671
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[AMD][CI] Restore gfx942 Grok-1 INT4 and Grok-2 schedules (#34761)
Co-authored-by: Michael <michaelzhang-ai@users.noreply.github.com>
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2026-08-13 15:57:54 -07:00 |
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Khoa PhamandClaude Opus 5
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f3beb2c529
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[CI] Disable the prefill CUDA graph on the P worker of test_kimi_linear_pd_dcp4 (#34779)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-13 15:26:21 -07:00 |
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Khoa PhamandClaude Opus 5
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81fe452810
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[DCP] Share one pack kernel between both a2a backends (#34651)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-13 15:06:02 -07:00 |
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Lianmin Zheng
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8bbca87780
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[Core] Organize environment variable registry (#34730)
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2026-08-13 14:25:37 -07:00 |
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Khoa PhamandCursor
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652a2709d1
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[Docs] Add decode context parallelism to advanced features (#34654)
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-08-13 13:51:57 -07:00 |
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jthomson04
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903439044a
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perf(kv-events): coalesce cache events (#31479)
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2026-08-13 13:36:53 -07:00 |
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Liangsheng Yin
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8554d9a5bc
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[Fix] Carry the backend on Kimi-K3 deferred preprocessing configs (#34766)
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2026-08-13 13:30:33 -07:00 |
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Lukas Humbel
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8ad04a9bee
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docs(nixl): document OBJ throughput target (#30405)
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2026-08-13 13:04:13 -07:00 |
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kangwangamdandBingxu Chen
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29b067245b
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[AMD] CI: drop the spaces from SGL_EVAL_SPEC (fixes ROCm 7.2 stage-a sgl-eval install) (#34689)
Co-authored-by: Bingxu Chen <bingxche@amd.com>
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2026-08-13 12:48:58 -07:00 |
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Mohammad Miadh Angkad
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96db53ec70
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[CI] Fix test_resolution_is_reproducible after cuda_ipc became opt-in (#34746)
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2026-08-13 12:47:03 -07:00 |
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6b94d39f13
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[Model Loading] Overlap checkpoint staging with CUDA graph capture during startup (#32017)
Co-authored-by: Wenhui Zhu <wzhu59@asu.edu>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-13 12:26:25 -07:00 |
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Shangming Cai
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0772e79ee7
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[CI][PD] Pin nccl rendezvous port per side to fix flaky disaggregation tests (#34755)
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2026-08-14 01:44:20 +08:00 |
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jambow0320
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a82f8e1777
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[PD] Add the missing Prefill bootstrap timeout for NIXL (#34692)
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2026-08-14 01:08:09 +08:00 |
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69a31ce342
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fix: make Cache-DiT actually cache on MiniMax-H3 (#33827)
Signed-off-by: YZLi <yuanli@nvidia.com>
Signed-off-by: yunch <yunch@nvidia.com>
Co-authored-by: YZLi <yuanli@nvidia.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-08-14 00:39:58 +08:00 |
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Xiaoyu Zhang
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c255fbc4fe
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[Diffusion] Add @triple-mu as a code owner (#34748)
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2026-08-14 00:37:49 +08:00 |
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triple-mu
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ea7a6e0e99
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fix(diffusion): unshard FSDP root group for custom encoder entry points (#34575)
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2026-08-13 23:24:00 +08:00 |
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Xiaoyu Zhang
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ebca0bbde4
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[Diffusion][ERNIE] Fuse QKNorm with full-width RoPE (#34620)
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2026-08-13 23:23:21 +08:00 |
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Xiaoyu Zhang
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82f7afb881
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[Diffusion] Make auto residency decisions component-scoped (#34615)
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2026-08-13 23:20:55 +08:00 |
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07821e9d56
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[AMD][CI] Stop scheduling Grok-1 and Grok-2 on MI30x (#34643)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: Michael <michaelzhang-ai@users.noreply.github.com>
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2026-08-13 22:22:42 +08:00 |
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c1142677a8
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[do not merge] add new cookbooks (#34658)
Co-authored-by: Jianfei Wang <jianfei.wangg@outlook.com>
Co-authored-by: Jianfei Wang <905787410@qq.com>
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2026-08-13 13:35:15 +00:00 |
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Xiaoyu Zhang
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74c0322342
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[Diffusion][FLUX.2] Fuse eager AdaLN and packed SwiGLU (#34616)
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2026-08-13 19:55:53 +08:00 |
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Xiaoyu Zhang
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3c1791a7df
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[Diffusion][HunyuanVideo] Fuse eager QKV packing and high-quality QKNorm (#34617)
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2026-08-13 19:54:00 +08:00 |
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triple-muandXiaoyu Zhang
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993e24df75
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[diffusion] Add --dit-layerwise-residency-policy for strided DiT residency (#34534)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-08-13 19:49:56 +08:00 |
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Liu ZhenlongandXiaoyu Zhang
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b764194e81
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[diffusion] model: support LongCat-Image (#23274)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-08-13 19:48:26 +08:00 |
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Estrella-xx
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eea2e5d6e5
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Optimize delayed sample and mrope position computation (#32637)
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2026-08-13 19:15:47 +08:00 |
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Baizhou Zhang
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9c0d4cba3f
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[CI] Split Kimi K2.5 performance batches by config (#34669)
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2026-08-13 03:20:50 -07:00 |
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Xiaoyu ZhangandClaude Fable 5
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a23670ddbf
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[diffusion] Wan2.2-TI2V: fuse per-token adaLN table add into contiguous slices + hoist rope cache (denoise -13.1% H100 / -12.6% H200, bit-exact; eager beats compile) (#34584)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-13 17:26:46 +08:00 |
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Rain Jiang
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ba23846ccf
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move the PD bootstrap registry under api_server::disaggregation (#33895)
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2026-08-13 02:13:43 -07:00 |
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34206c0017
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[AMD] Run V4 MTP target-verify through the decode kernel (#34597)
Co-authored-by: RolaoDenthu <xinyis10@illinois.edu>
Co-authored-by: 1am9trash <1am9trash>
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
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2026-08-13 02:00:45 -07:00 |
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Rain Jiang
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fd1e04d952
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refactor error responses into shared utils::response helpers (#33894)
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2026-08-13 01:30:29 -07:00 |
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Rainchar9119
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dbebc1deb4
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[Perf] Occupancy tuning for DSA indexer fp8-quant Q kernel (#32755)
Signed-off-by: Rainchar9119 <1134601163@qq.com>
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2026-08-13 01:15:27 -07:00 |
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fad376d3ee
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[CPU][QUANT] add amx cpu support for auto-round (#29593)
Signed-off-by: WeiweiZhang1 <weiwei1.zhang@intel.com>
Signed-off-by: sys-lpot-val <sys_lpot_val@intel.com>
Co-authored-by: sys-lpot-val <sys_lpot_val@intel.com>
Co-authored-by: Weiwei Zhang <WeiweiZhang1@users.noreply.github.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-08-13 15:50:59 +08:00 |
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Xinyi SongandThomas Wang
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c034120cb8
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[AMD] Enable draft-extend CUDA graph and reduce bubble for MTP (#29202)
Co-authored-by: Thomas Wang <thomawan@amd.com>
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2026-08-13 00:50:19 -07:00 |
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AMD-yanfeiwangandZhangheng
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a34f81251f
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fix(hicache/umbp): support DeepSeek-V4 hybrid HostPoolGroup (multi-po… (#30762)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-08-13 15:40:07 +08:00 |
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jacky.cheng
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b7f87a2513
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[AMD][Perf] Fuse GatedDeltaNet QKVZBA split/reshape/cat into a single Triton kernel for Qwen3.5-architecture MoE on HIP (#34421)
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2026-08-13 00:18:35 -07:00 |
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Ke Bao
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5a5c3d309b
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Drop the mmlu case from the unified radix cache kit (#34667)
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2026-08-13 15:16:05 +08:00 |
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MickandClaude Opus 5
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969921b32d
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[diffusion] chore: track minimax-h3 in the nightly diffusion benchmark (#34655)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-13 15:12:26 +08:00 |
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Xinguo Zhu
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3f6ef01322
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Optimize MiniMax-M2.7 on CPU (#31956)
|
2026-08-13 15:04:16 +08:00 |
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Gabriel Wu
|
889c2f31aa
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feat(attention): add architecture-owned SM12x FA4 kernels (#32991)
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2026-08-12 23:58:42 -07:00 |
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