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253 Commits
Author SHA1 Message Date
Dayananda VandClaude Opus 5 35eb7cf8d6 [Intel][XPU][KVCanary] Enable KV Canary on Intel XPU (#33520) 
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
 2026-09-22 09:19:01 +08:00
Cheng Wan bccf691b22 Bringing the parallel runtime up becomes a phase, not a side effect (#40345) 2026-09-21 12:29:50 -07:00
Cheng Wan 970e946e4f Retire the per-runner parallel record (#40343) 2026-09-21 12:26:40 -07:00
Cheng Wan 2d0e94e3a3 Check the topology identities where the layout is written, and build at the published widths (#40340) 2026-09-21 12:22:59 -07:00
HuangJi 2a0cb2f04e [Diffusion][MiniMax-H3] Add SM120 Sage compute for SubBlock sparse attention (#40116) 2026-09-20 16:40:28 +08:00
Ke Bao a8a4d86be9 Remove swa and mamba radix cache (#40313) 2026-09-20 16:16:27 +08:00
Liangsheng Yin d507accadc [Test] Drop dead and strictly-subsumed CI test registrations (#40264) 2026-09-18 17:49:13 -07:00
iridiumine f86f60081d [NPU] Adapt hicache for K3 hybrid models (#39415) 2026-09-18 14:48:20 +08:00
Jensen 3ce3b4969f [NPU] Avoid repeated BF16 wo_a weight transposes in DeepSeek-V4 decode (#39919) 2026-09-18 09:10:43 +03:00
Cheng Wan 406c9c71d8 [Feature] Support BF16 and batch-invariant inference with DeepEP v2 (#38160) 2026-09-15 14:30:50 -07:00
Cheng Wan fa663e7297 config: delete the redundant full stamp in initialize_model_parallel (#39202) 2026-09-12 17:27:21 -07:00
iridiumine a984c78330 [NPU] Support DFlash speculative decoding for MiMo-V2.5-Pro (mxfp4) (#37565) 2026-09-12 11:59:23 +08:00
Miaomiao Jiang 690428b470 [XPU] Add xpu forward in Gemma3RMSNorm & Add test and benchmark for Gemma3RMSNorm (#36278) 2026-09-11 10:32:25 +08:00
ANSHUMAN TRIPATHYandmingfeima 2adb2e8485 [XPU] Adapt device agnostic API usage (#32093) 
Co-authored-by: mingfeima <mingfei.ma@intel.com>
 2026-09-11 10:03:12 +08:00
Shu Wangdjns99云挚Yangmin LiPo-Han Huang
 		1b77f498a0 [NVIDIA] Support flashinfer Mega Moe (#31470) 
Co-authored-by: djns99 <40156487+djns99@users.noreply.github.com>
Co-authored-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
 2026-09-10 00:22:47 -07:00
Cheng Wan db272201a2 [Config] Retire get_global_server_args, and clear the deprecated flags that have a replacement (#38375) 2026-09-08 16:42:12 -07:00
Anupa Sajikumar 91a45ea37e [Intel][XPU][LoRA] Enable LoRA on Intel XPU (#30345) 2026-09-08 12:46:41 +08:00
Polisetty V R K Jyothendra Varma e59a576f03 fix test/manual/test_forward_split_prefill.py UT due to many refactors and design changes (#36617) 
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
 2026-09-03 01:48:55 -07:00
Alex NailsandAlison Shao 28262c20df [CI][RFC] Replace black-jupyter with ruff-format (#37210) 
Co-authored-by: Alison Shao <a.shao@wustl.edu>
 2026-09-02 19:46:08 -07:00
Liangsheng Yin a522c8a4b6 [misc] Extract PP dynamic chunk sizing into a DynamicChunkSizer scheduler component (#37674) 2026-09-02 18:35:43 -07:00
Yuan Luoandluoyuan.luo 5b04408784 [MoE] Add FlashInfer SM90 MXFP4 W4A8 CUTLASS MoE (#34967) 
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
 2026-08-31 20:04:41 -07:00
Xiaoyu Zhang 52e1c24744 [Diffusion] Fuse FLUX.2 token concatenation and NVFP4 quantization (#37141) 2026-08-31 21:33:02 +08:00
Liangsheng Yin 007ef5e23a [mem_cache] Move req_pool_idx into ReqKvInfo (#37094) 2026-08-30 14:46:21 -07:00
Liangsheng Yin 0438b16154 [mem_cache] Move kv_committed_len into ReqKvInfo (#37078) 2026-08-29 22:42:25 -07:00
Liangsheng Yin 6be767c2d2 [mem_cache] Move cache_protected_len and swa_evict_floor into ReqKvInfo (#36982) 2026-08-29 19:37:53 -07:00
Liangsheng Yin 9a489f8d2f [Test] Move gpqa and aime25 onto sgl-eval, drop unused eval paths (#36979) 2026-08-29 17:36:13 -07:00
Jonny Kongandjonnykong 4d78d59e51 [MoE] Make simulated expert routing support DP>1, and fuse into one triton kernel (#29718) 
Co-authored-by: jonnykong <jonnykong@fb.com>
 2026-08-28 14:22:45 -07:00
Lianmin Zheng 94183a8d2b Move server args config parser under utils (#36681) 2026-08-27 03:34:50 -07:00
Lianmin Zheng 3402265989 [Core] Refactor server argument choices (#36586) 2026-08-27 01:56:03 -07:00
Liangsheng YincswuygcswuygVedant JhaveriVedant Jhaveri
 		ec4bdbfa4a [Feature] Beam search support (#31626) 
Co-authored-by: cswuyg <cswuyg@gmail.com>
Co-authored-by: cswuyg <496090217@qq.com>
Co-authored-by: Vedant Jhaveri <vedantjh2@gmail.com>
Co-authored-by: Vedant Jhaveri <vjhaveri@linkedin.com>
 2026-08-26 16:56:15 -07:00
Cheng Wan 937af8538b config: the runtime readers take the published bags (#36254) 2026-08-26 05:08:25 -07:00
Cheng Wan d7b144f64e config: publishing is the process entry's job (#36251) 2026-08-26 04:58:41 -07:00
Chao Shiybyanghzh0425shangmingc晟海
 		829138a31e [HiCache] Fix PP inconsistency with HiCache L3 (#22607) (#27010) 
Co-authored-by: ybyang <ybyang7@iflytek.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
Co-authored-by: shangmingc <csmthu@gmail.com>
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
 2026-08-25 20:49:57 +08:00
Baizhou Zhang 833be86c15 [CP V1 Deprecation 1/5] Migrate tests to strategy-based prefill CP (#36222) 2026-08-24 20:15:34 -07:00
Xun Sunandsiyu a90d770c40 [Weight Cache] Support static DP/EP layouts (#33684) 
Co-authored-by: siyu <liusy58@linux.alibaba.com>
 2026-08-23 19:57:52 -07:00
Hồ Sỹ Thế eec794bce0 [AMD][Spec] Fix aiter GQA packing + split-KV routing in NEXTN spec attention (verify & draft_extend) (#30105) 2026-08-22 14:22:43 -07:00
Yanbin Jiang 7d893255c3 [Spec][LoRA] Support multi-adapter LoRA with EAGLE/NEXTN/DFLASH/DSPARK speculative decoding (#34337) 2026-08-21 14:21:53 -07:00
vikram singh shekhawatandClaude Sonnet 4.5 f7a404e9c3 Fix rope config compatibility and VL/transformers-fallback weight loading (#31575) 
Co-authored-by: Claude Sonnet 4.5 (1M context) <noreply@anthropic.com>
 2026-08-17 14:53:59 +08:00
Brayden ZhongandBrayden Zhong 5e65dd01a7 Remove the torchao integration (--torchao-config) (#34304) 
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
 2026-08-14 21:49:11 +08:00
jthomson04 903439044a perf(kv-events): coalesce cache events (#31479) 2026-08-13 13:36:53 -07:00
+76
vstone-wClownBinhuangzhenyuclownbadmerLiangsheng YinYAMYShangming CaiMickBrayden ZhongBrayden ZhongJimmy ShongZijie XiaThomas WangsiyuYuang ChenYuang Chen黄孝君Xinyuan TongXiaoyu ZhangCursorClaude Fable 5TobyMintTobyMintCheng WanTan TrinhLifan ShenJustin TongQiaolin YuAMD-yanfeiwangQIN2DIMZhiyao JiangBrayden ZhongDevashishLal-CBDevashish LalAlex NailsMohammad Miadh AngkadBaizhou ZhangMichael GschwindweireweireweireweireKhoa PhammilesialelvischenvcctryJae B.MichaelforrestlEchOTanmay patilybyangHsiu-Chun, HungHungHaiShawBingxu ChenYC Yen-Ching TsengCherry_mingEven Zhousglang-npu-botZhiqiang XieTingwei HuangKaixigithub-actions[bot]Faradawn YangRyan StewartgjsheuJinyan YiKe BaohuangtingweiHanming LuJeremy ZhangDmitrii SergeevHao ZhangzhisbugDouglas Yanggongwei1027ilyasher-harmonicHanming Lusglang-botsglang-botJimmy Shonghnyls2002Meng, HengyuShu WangYanbin Jiangzijiec
 		bca8ed4afc [minimax m3][npu]Adaptation of Minimax M3(w8a8) for NPU platforms [1/2] (#32941) 
Signed-off-by: Devashish Lal <devcode@fb.com>
Signed-off-by: Alexandre Milesi <milesial@users.noreply.github.com>
Signed-off-by: Faradawn Yang <73060648+faradawn@users.noreply.github.com>
Signed-off-by: Ryan Stewart <rystewart@nvidia.com>
Co-authored-by: ClownBin <chaobin1993@126.com>
Co-authored-by: huangzhenyu <q_m_p@qq.com>
Co-authored-by: clown <17490516+ClownBin@users.noreply.github.com>
Co-authored-by: badmer <374330057@qq.com.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
Co-authored-by: YAMY <74099316+YAMY1234@users.noreply.github.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
Co-authored-by: Brayden Zhong <brayden.zhong@radixark.ai>
Co-authored-by: Jimmy Shong <jimmysh341@gmail.com>
Co-authored-by: Zijie Xia <zijie.xia@radixark.ai>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: siyu <liusy58@linux.alibaba.com>
Co-authored-by: Yuang Chen <cya539102@antgroup.com>
Co-authored-by: Yuang Chen <1131578721@qq.com>
Co-authored-by: 黄孝君 <dingfangsu23@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: TobyMint <130973409+TobyMint@users.noreply.github.com>
Co-authored-by: TobyMint <tobymint@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Tan Trinh <84185999+tanth47@users.noreply.github.com>
Co-authored-by: Lifan Shen <draftbks@gmail.com>
Co-authored-by: Justin Tong <justintong0323@outlook.com>
Co-authored-by: Qiaolin Yu <liin1211@outlook.com>
Co-authored-by: AMD-yanfeiwang <yanfei.wang@amd.com>
Co-authored-by: QIN2DIM <62018067+QIN2DIM@users.noreply.github.com>
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
Co-authored-by: DevashishLal-CB <devashish@rivosinc.com>
Co-authored-by: Devashish Lal <devcode@fb.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Michael Gschwind <mkgschwind+private@gmail.com>
Co-authored-by: weireweire <weiliangl@nvidia.com>
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: milesial <milesial@users.noreply.github.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: cctry <csycfl@gmail.com>
Co-authored-by: Jae B. <jlee5814@gmail.com>
Co-authored-by: Michael <13900043+michaelzhang-ai@users.noreply.github.com>
Co-authored-by: forrestl <16055533+forrestl111@users.noreply.github.com>
Co-authored-by: EchO <117733745+CyberSecurityErial@users.noreply.github.com>
Co-authored-by: Tanmay patil <tanmaypatil3151@gmail.com>
Co-authored-by: ybyang <10629930+whybeyoung@users.noreply.github.com>
Co-authored-by: Hsiu-Chun, Hung <160560375+Emmanuel0612@users.noreply.github.com>
Co-authored-by: Hung <Emmanuel0612@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
Co-authored-by: YC Yen-Ching Tseng <yctseng@amd.com>
Co-authored-by: Cherry_ming <136634645@qq.com>
Co-authored-by: Even Zhou <even.y.zhou@outlook.com>
Co-authored-by: sglang-npu-bot <sglangnpu@163.com>
Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu>
Co-authored-by: Tingwei Huang <huangtingwei9988@gmail.com>
Co-authored-by: Kaixi <kaiximatteoc@nvidia.com>
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
Co-authored-by: Faradawn Yang <73060648+faradawn@users.noreply.github.com>
Co-authored-by: Ryan Stewart <rystewart@nvidia.com>
Co-authored-by: gjsheu <gjsheu@163.com>
Co-authored-by: Jinyan Yi <yjy20010615@gmail.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: huangtingwei <141888744+huangtingwei9988@users.noreply.github.com>
Co-authored-by: Hanming Lu <hanminglu@meta.com>
Co-authored-by: Jeremy Zhang <jeremy.zhang866@gmail.com>
Co-authored-by: Dmitrii Sergeev <dmi.sergeev@gmail.com>
Co-authored-by: Hao Zhang <zhisbug@users.noreply.github.com>
Co-authored-by: zhisbug <1654062+zhisbug@users.noreply.github.com>
Co-authored-by: Douglas Yang <dyang@college.harvard.edu>
Co-authored-by: gongwei1027 <gongwei833x@gmail.com>
Co-authored-by: ilyasher-harmonic <ilya.sherstyuk@harmonic.fun>
Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com>
Co-authored-by: sglang-bot <sglangbot@gmail.com>
Co-authored-by: sglang-bot <232288953+sglang-bot@users.noreply.github.com>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Meng, Hengyu <hengyu.meng@intel.com>
Co-authored-by: Shu Wang <shuw@nvidia.com>
Co-authored-by: Yanbin Jiang <jybsuper@gmail.com>
Co-authored-by: zijiec <zijie.chen@amd.com>
 2026-08-13 11:23:14 +08:00
Liangsheng Yin c05eb856f7 [CI] Fix nightly test failures (#34523) 2026-08-12 15:40:20 -07:00
Zhiqiang XieandTingwei Huang 5469faec45 HiSparse: shared-index (IndexShare) plan-then-IO swap-in prefetch (#34329) 
Co-authored-by: Tingwei Huang <huangtingwei9988@gmail.com>
 2026-08-11 01:58:28 -07:00
Brayden ZhongandBrayden Zhong b3ee679467 [MXFP8] Use FlashInfer CUTLASS for dense GEMM on SM120, delete Triton path (#33208) 
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
 2026-08-07 14:30:43 -07:00
Ke Bao 0756a1d2b0 Move SWA chunk-cap hatch tests into the registered suite (#33975) 2026-08-07 17:49:07 +08:00
Peng Wu 21225aba3d [Scheduler] Fix to restrict the SWA chunk-cap escape hatch to true head-of-line livelock (#32700) 2026-08-06 22:09:04 +08:00
Yoray Zack 48f1b14fc7 test: fix NIXL EP Mooncake FT test (#32638) 2026-08-06 18:00:18 +08:00
Baizhou Zhang 0e584529f5 [CI] Remove profiling from nightly tests (#33832) 2026-08-06 01:16:08 -07:00
Xiaoyu ZhangandClaude Fable 5 4c0a8940fa [Kernel] Unify BaseFusedOp and MultiPlatformOp dispatch (#33205) 
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
 2026-08-06 08:52:09 +08:00
Liangsheng Yin b6d548afd7 [Fix] Resolve VLM test image placeholders from the model's own chat template (#33509) 2026-08-04 02:01:39 -07:00