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dsv41-pd
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18 Commits
Author SHA1 Message Date
Lianmin ZhengandJialin Ouyang f5a1434700 [HiCache] Document transfer arguments (#40239) 
Clarify the legacy host_indices argument and label Mamba test arguments,
including the current staging_tokens parameter. Executable code is unchanged.

Co-authored-by: Jialin Ouyang <Jialin.Ouyang@gmail.com>
 2026-09-18 14:08:19 -07:00
Shuwen Wang 191172fa74 [Unified Tree] fix: exempt host-locked aux nodes from the sanity_check host-LRU check (#39980) 2026-09-18 15:29:29 +00:00
Thomas Wang 6c73368c32 [AMD][DSV4] Enable hicache on deepseek-v4 fp8 unified attn (#37778) 2026-09-17 11:29:23 -07:00
Liangsheng Yin 2f7d04da5d dsv4.1: Rust extension modules for image preprocessing, KV pool names, and PD bootstrap (#39677) 2026-09-15 18:11:48 -07:00
Zhiqiang Xie 7f5dd19256 [HiCache] Rework the buffer-mode storage prefetch pipeline and retry bookkeeping (#39283) 2026-09-15 10:48:49 -07:00
ishandhanani 3f871a246c feat(agent sessions): attribute stored KV cache blocks to sessions (#37482) 
Signed-off-by: Ishan Dhanani <ishandhanani@gmail.com>
 2026-09-14 21:34:49 -07:00
Shuwen WangandClaude Opus 5 7f1f8c706a [mem_cache][10/N] refactor: drop the redundant _component suffix in unified_cache/components (#35644) 
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-13 21:38:20 +08:00
Jundong LiuandShuwen Wang 7078e5ffbc [HiCache] Publish a host store event for storage-prefetch refills (#38486) 
Co-authored-by: Shuwen Wang <47200617+alphabetc1@users.noreply.github.com>
 2026-09-13 10:29:14 +00:00
Shuwen Wang bd45cd50ca [Unified Tree] Port SWA Branching-Point Caching to the Rust TreeCore (#37584) 2026-09-12 18:37:57 +08:00
Yanbin JiangandShuwen Wang 0b415fa573 [HiCache][LoRA] Isolate storage pages by extra key (#38577) 
Co-authored-by: Shuwen Wang <47200617+alphabetc1@users.noreply.github.com>
 2026-09-12 18:18:14 +08:00
Shuwen Wang b9cb96496d [Unified Tree] Preserve aux LRU recency when splitting nodes (#38482) 2026-09-12 18:17:38 +08:00
Jialin Ouyang 908226fea2 [Rust TreeCore] Support external cache linker (#37306) 2026-09-10 19:22:24 +08:00
Zhiqiang Xie beaf3d9252 [HiCache] Replace skip_lock_node_ids with a segment lock protocol (#36848) 2026-09-09 14:55:51 -07:00
Jialin Ouyang 7a464a7014 [Rust TreeCore] Harden runtime and CI parity (#37303) 2026-09-09 10:40:22 +08:00
Shuwen Wang 19b46863f3 fix: align write-through pending across tree cores (#37278) 2026-09-04 22:08:25 +08:00
Xinyi Song1am9trashAMD-yanfeiwangThomas Wang
 		f8cbf000f4 [AMD] Enable FP4 indexer for Deepseek V4 (#37353) 
Co-authored-by: 1am9trash <1am9trash@gmail.com>
Co-authored-by: AMD-yanfeiwang <256076023+AMD-yanfeiwang@users.noreply.github.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
 2026-09-02 09:45:08 -07:00
Liangsheng Yin 832d029870 [mem_cache] Split duplicate insert frees at the SWA eviction floor (#37481) 2026-09-01 23:01:40 -07:00
Jialin Ouyang a77283fb02 [Rust] Rename mem-cache to sglang-radix-tree (#37290) 2026-09-01 03:03:44 -07:00