[CI] Pin NCCL ports for GB300 PR tests (#33044)

This commit is contained in:
Baizhou Zhang
2026-07-31 02:28:37 -07:00
committed by GitHub
parent 2573190b93
commit fd28242b68
3 changed files with 26 additions and 0 deletions
@@ -7,6 +7,7 @@ from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.run_eval import run_eval from sglang.test.run_eval import run_eval
from sglang.test.test_utils import ( from sglang.test.test_utils import (
DEFAULT_DEEPSEEK_NVFP4_MODEL_FOR_TEST, DEFAULT_DEEPSEEK_NVFP4_MODEL_FOR_TEST,
DEFAULT_PORT_FOR_SRT_TEST_RUNNER,
DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH, DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH,
DEFAULT_URL_FOR_TEST, DEFAULT_URL_FOR_TEST,
CustomTestCase, CustomTestCase,
@@ -16,6 +17,9 @@ from sglang.test.test_utils import (
register_cuda_ci(est_time=1800, stage="base-c", runner_config="4-gpu-gb300") register_cuda_ci(est_time=1800, stage="base-c", runner_config="4-gpu-gb300")
# Keep rendezvous ports below the ephemeral range on the 4-GPU GB300 runner.
NCCL_PORT_BASE = DEFAULT_PORT_FOR_SRT_TEST_RUNNER + 100
class TestDeepseekR1Nvfp4CuteDSLDeepEP(CustomTestCase): class TestDeepseekR1Nvfp4CuteDSLDeepEP(CustomTestCase):
@classmethod @classmethod
@@ -42,6 +46,8 @@ class TestDeepseekR1Nvfp4CuteDSLDeepEP(CustomTestCase):
"--moe-dense-tp-size", "--moe-dense-tp-size",
"1", "1",
"--enable-dp-attention", "--enable-dp-attention",
"--nccl-port",
str(NCCL_PORT_BASE),
"--quantization", "--quantization",
"modelopt_fp4", "modelopt_fp4",
"--attention-backend", "--attention-backend",
@@ -114,6 +120,8 @@ class TestDummyWithSBO(CustomTestCase):
"--moe-dense-tp-size", "--moe-dense-tp-size",
"1", "1",
"--enable-dp-attention", "--enable-dp-attention",
"--nccl-port",
str(NCCL_PORT_BASE + 1),
"--quantization", "--quantization",
"modelopt_fp4", "modelopt_fp4",
"--attention-backend", "--attention-backend",
@@ -8,6 +8,7 @@ from sglang.test.server_fixtures.disaggregation_fixture import (
PDDisaggregationServerBase, PDDisaggregationServerBase,
) )
from sglang.test.test_utils import ( from sglang.test.test_utils import (
DEFAULT_PORT_FOR_SRT_TEST_RUNNER,
DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH, DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH,
popen_launch_pd_server, popen_launch_pd_server,
) )
@@ -16,6 +17,9 @@ QWEN3_8B_MODEL_PATH = "Qwen/Qwen3-8B"
register_cuda_ci(est_time=300, stage="base-c", runner_config="4-gpu-gb300") register_cuda_ci(est_time=300, stage="base-c", runner_config="4-gpu-gb300")
# Keep rendezvous ports below the ephemeral range on the 4-GPU GB300 runner.
NCCL_PORT_BASE = DEFAULT_PORT_FOR_SRT_TEST_RUNNER + 120
class TestDisaggregationMooncakeAARCH64Accuracy(PDDisaggregationServerBase): class TestDisaggregationMooncakeAARCH64Accuracy(PDDisaggregationServerBase):
@classmethod @classmethod
@@ -51,6 +55,8 @@ class TestDisaggregationMooncakeAARCH64Accuracy(PDDisaggregationServerBase):
cls.bootstrap_port, cls.bootstrap_port,
"--tp", "--tp",
"2", "2",
"--nccl-port",
str(NCCL_PORT_BASE),
] ]
prefill_args += cls.transfer_backend + cls.rdma_devices prefill_args += cls.transfer_backend + cls.rdma_devices
cls.process_prefill = popen_launch_pd_server( cls.process_prefill = popen_launch_pd_server(
@@ -72,6 +78,8 @@ class TestDisaggregationMooncakeAARCH64Accuracy(PDDisaggregationServerBase):
"2", "2",
"--base-gpu-id", "--base-gpu-id",
"2", "2",
"--nccl-port",
str(NCCL_PORT_BASE + 1),
] ]
decode_args += cls.transfer_backend + cls.rdma_devices decode_args += cls.transfer_backend + cls.rdma_devices
cls.process_decode = popen_launch_pd_server( cls.process_decode = popen_launch_pd_server(
+10
View File
@@ -7,6 +7,7 @@ from sglang.srt.utils import kill_process_tree
from sglang.test.ci.ci_register import register_cuda_ci from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.run_eval import run_eval from sglang.test.run_eval import run_eval
from sglang.test.test_utils import ( from sglang.test.test_utils import (
DEFAULT_PORT_FOR_SRT_TEST_RUNNER,
DEFAULT_URL_FOR_TEST, DEFAULT_URL_FOR_TEST,
CustomTestCase, CustomTestCase,
popen_launch_server, popen_launch_server,
@@ -14,6 +15,9 @@ from sglang.test.test_utils import (
register_cuda_ci(est_time=500, stage="base-c", runner_config="4-gpu-gb300") register_cuda_ci(est_time=500, stage="base-c", runner_config="4-gpu-gb300")
# Keep rendezvous ports below the ephemeral range on the 4-GPU GB300 runner.
NCCL_PORT_BASE = DEFAULT_PORT_FOR_SRT_TEST_RUNNER + 110
DEEPSEEK_V3_FP4_MODEL = "nvidia/DeepSeek-V3-0324-FP4" DEEPSEEK_V3_FP4_MODEL = "nvidia/DeepSeek-V3-0324-FP4"
GLM52_NVFP4_MODEL = "nvidia/GLM-5.2-NVFP4" GLM52_NVFP4_MODEL = "nvidia/GLM-5.2-NVFP4"
QWEN3_FP8_MODEL = "Qwen/Qwen3-Next-80B-A3B-Instruct-FP8" QWEN3_FP8_MODEL = "Qwen/Qwen3-Next-80B-A3B-Instruct-FP8"
@@ -42,6 +46,8 @@ class TestFlashinferA2ATrtllmRoutedFP4(CustomTestCase):
"--dp", "--dp",
"4", "4",
"--enable-dp-attention", "--enable-dp-attention",
"--nccl-port",
str(NCCL_PORT_BASE),
"--moe-a2a-backend", "--moe-a2a-backend",
"flashinfer", "flashinfer",
"--moe-runner-backend", "--moe-runner-backend",
@@ -93,6 +99,8 @@ class TestFlashinferA2ACutedslStaticFP4(CustomTestCase):
"--dp", "--dp",
"4", "4",
"--enable-dp-attention", "--enable-dp-attention",
"--nccl-port",
str(NCCL_PORT_BASE + 1),
"--moe-a2a-backend", "--moe-a2a-backend",
"flashinfer", "flashinfer",
"--moe-runner-backend", "--moe-runner-backend",
@@ -152,6 +160,8 @@ class TestFlashinferA2ATrtllmRoutedFP8(CustomTestCase):
"--dp", "--dp",
"4", "4",
"--enable-dp-attention", "--enable-dp-attention",
"--nccl-port",
str(NCCL_PORT_BASE + 2),
"--moe-a2a-backend", "--moe-a2a-backend",
"flashinfer", "flashinfer",
"--moe-runner-backend", "--moe-runner-backend",