[PD][AMD]: incremental KV transfer with decode radix cache (#26288)

Signed-off-by: inkcherry <mingzhi.liu@amd.com> Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
2026-06-13 00:06:44 -07:00
parent f4029d0fc0
commit eb9483b5c2
4 changed files with 64 additions and 9 deletions
@@ -118,7 +118,7 @@ class TestLoadBalanceMethod(unittest.TestCase):
                disaggregation_transfer_backend="fake",
            )

-        self.assertIn("('nixl', 'mooncake')", str(context.exception))
+        self.assertIn("('nixl', 'mooncake', 'mori')", str(context.exception))
        self.assertIn("'fake'", str(context.exception))