diff --git a/scripts/ci/check_registered_tests.py b/scripts/ci/check_registered_tests.py index 7c012b45d..d9f80121c 100755 --- a/scripts/ci/check_registered_tests.py +++ b/scripts/ci/check_registered_tests.py @@ -4,13 +4,18 @@ Pre-commit hook: validate CI registry calls under test/registered/. 1. Every test file must contain a CI registry call (register_cuda_ci, register_amd_ci, etc.). -2. A CUDA test must not register a `{stage}-test-{runner_config}`-shaped suite - via the legacy single-string `suite=`: that form is not dispatchable via - /rerun-test. Use the modern `stage=`/`runner_config=` form instead -- it - resolves to the identical suite (CIRegistry.effective_suite is - f"{stage}-test-{runner_config}"), so same stage and same runner, just - /rerun-test-able. Legacy `suite=` stays valid for nightly/stress/weekly + - AMD/CPU/NPU suites whose names don't follow that shape. +2. A CUDA test must register its PR-test suite via the modern + `stage=`/`runner_config=` form. The legacy single-string `suite=` is reserved + for the nightly/stress/weekly families (and for AMD/CPU/NPU suites); any other + CUDA `suite=` resolves to a name no PR-test workflow invokes, so the test + silently never runs. Two shapes are rejected: + a. `{stage}-test-{runner_config}` -- the modern name stuffed back into the + legacy form. Reported with the exact stage/runner split to use. + b. an older `{stage}-{runner_config}` PR-test name (e.g. the pre-migration + `base-b-kernel-unit-1-gpu-large`) -- no longer matches any workflow + suite at all. + The modern form resolves to the identical suite (CIRegistry.effective_suite + is f"{stage}-test-{runner_config}") and is /rerun-test-able. Reuses ut_parse_one_file() from ci_register.py (AST-based parsing) to match the same logic used by run_suite.py's collect_tests(). @@ -27,6 +32,12 @@ import sys # shape is always expressible (and should be expressed) the modern way. _MODERN_SHAPE = re.compile(r"^(.+)-test-(.+)$") +# The only suite families a CUDA registry may keep on the legacy single-string +# `suite=` form. Everything else is a PR-test/base stage that must use the +# modern stage=/runner_config= form (otherwise its effective_suite matches no +# suite the PR-test workflows invoke, and the test silently never runs). +_LEGACY_CUDA_PREFIXES = ("nightly", "stress", "weekly") + def main() -> int: # Import ci_register directly to avoid pulling in all of sglang @@ -48,7 +59,8 @@ def main() -> int: return 0 missing = [] - legacy_shape = [] # (file, suite, stage, runner_config) + legacy_shape = [] # (file, suite, stage, runner_config) -- has a -test- split + non_dispatchable = [] # (file, suite) -- legacy CUDA suite no workflow invokes for f in files: try: registries, _has_main_entry = ci_register.ut_parse_one_file(f) @@ -67,9 +79,15 @@ def main() -> int: and r.runner_config is None ): continue + # nightly/stress/weekly are the only CUDA suites allowed to stay on + # the legacy single-string form. + if r.suite.split("-", 1)[0] in _LEGACY_CUDA_PREFIXES: + continue m = _MODERN_SHAPE.match(r.suite) if m: legacy_shape.append((f, r.suite, m.group(1), m.group(2))) + else: + non_dispatchable.append((f, r.suite)) exit_code = 0 if missing: @@ -94,6 +112,21 @@ def main() -> int: ) print() exit_code = 1 + if non_dispatchable: + print( + 'ERROR: CUDA test(s) register a legacy `suite="..."` that is neither a ' + "nightly/stress/weekly suite nor the modern `stage=`/`runner_config=` " + "form. This name matches no suite the PR-test workflows invoke, so the " + "test silently never runs. Switch to the modern form:\n" + ) + for f, suite in non_dispatchable: + print( + f" {f}\n" + f' suite="{suite}"' + f' -> stage="...", runner_config="..."' + ) + print() + exit_code = 1 return exit_code diff --git a/test/registered/dcp/test_reduce_scatter_along_dim.py b/test/registered/dcp/test_reduce_scatter_along_dim.py index c29eed194..cbad393e6 100644 --- a/test/registered/dcp/test_reduce_scatter_along_dim.py +++ b/test/registered/dcp/test_reduce_scatter_along_dim.py @@ -29,7 +29,8 @@ from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci( est_time=120, - suite="base-b-kernel-unit-8-gpu-h200", + stage="extra-b", + runner_config="8-gpu-h200", ) # --------------------------------------------------------------------------- diff --git a/test/registered/jit/benchmark/bench_dsv3_fused_a_gemm.py b/test/registered/jit/benchmark/bench_dsv3_fused_a_gemm.py index b1d34cc2f..ef084d79d 100644 --- a/test/registered/jit/benchmark/bench_dsv3_fused_a_gemm.py +++ b/test/registered/jit/benchmark/bench_dsv3_fused_a_gemm.py @@ -20,7 +20,9 @@ from sglang.srt.utils.common import is_sm120_supported from sglang.test.ci.ci_register import register_cuda_ci from sglang.utils import is_in_ci -register_cuda_ci(est_time=12, suite="base-b-kernel-benchmark-1-gpu-large") +register_cuda_ci( + est_time=12, stage="base-b-kernel-benchmark", runner_config="1-gpu-large" +) IS_CI = is_in_ci() diff --git a/test/registered/jit/benchmark/bench_dsv3_router_gemm.py b/test/registered/jit/benchmark/bench_dsv3_router_gemm.py index b1e60de7c..a6df11bdd 100644 --- a/test/registered/jit/benchmark/bench_dsv3_router_gemm.py +++ b/test/registered/jit/benchmark/bench_dsv3_router_gemm.py @@ -18,7 +18,9 @@ from sglang.jit_kernel.dsv3_router_gemm import dsv3_router_gemm from sglang.jit_kernel.utils import get_jit_cuda_arch, is_hip_runtime from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=5, suite="base-b-kernel-benchmark-1-gpu-large") +register_cuda_ci( + est_time=5, stage="base-b-kernel-benchmark", runner_config="1-gpu-large" +) # sgl_kernel AOT kernel is specialized for hidden_dim=7168 only. SGL_KERNEL_HIDDEN_DIM = 7168 diff --git a/test/registered/jit/benchmark/bench_sparse_mla_q8kv8_prefill_sm90.py b/test/registered/jit/benchmark/bench_sparse_mla_q8kv8_prefill_sm90.py index 548df53c6..2a89fb23f 100644 --- a/test/registered/jit/benchmark/bench_sparse_mla_q8kv8_prefill_sm90.py +++ b/test/registered/jit/benchmark/bench_sparse_mla_q8kv8_prefill_sm90.py @@ -20,7 +20,9 @@ except ImportError: flash_mla_sparse_fwd = None HAS_Q16_FLASHMLA = False -register_cuda_ci(est_time=120, suite="base-b-kernel-benchmark-1-gpu-large") +register_cuda_ci( + est_time=120, stage="base-b-kernel-benchmark", runner_config="1-gpu-large" +) IS_CI = is_in_ci() DTYPE_FP8 = torch.float8_e4m3fn diff --git a/test/registered/jit/benchmark/bench_symm_mem_all_gather.py b/test/registered/jit/benchmark/bench_symm_mem_all_gather.py index dd562d87d..9abb934ff 100644 --- a/test/registered/jit/benchmark/bench_symm_mem_all_gather.py +++ b/test/registered/jit/benchmark/bench_symm_mem_all_gather.py @@ -37,7 +37,8 @@ from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci( est_time=120, - suite="base-b-kernel-benchmark-1-gpu-large", + stage="base-b-kernel-benchmark", + runner_config="1-gpu-large", disabled="requires multi-GPU, self-skips in CI", ) diff --git a/test/registered/jit/benchmark/diffusion/bench_causal_conv3d_cat_pad.py b/test/registered/jit/benchmark/diffusion/bench_causal_conv3d_cat_pad.py index 229eeeffa..f4e6ae892 100644 --- a/test/registered/jit/benchmark/diffusion/bench_causal_conv3d_cat_pad.py +++ b/test/registered/jit/benchmark/diffusion/bench_causal_conv3d_cat_pad.py @@ -13,7 +13,8 @@ from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci( est_time=20, - suite="base-b-kernel-benchmark-1-gpu-large", + stage="base-b-kernel-benchmark", + runner_config="1-gpu-large", disabled="standalone benchmark", ) diff --git a/test/registered/jit/benchmark/diffusion/bench_residual_gate_add.py b/test/registered/jit/benchmark/diffusion/bench_residual_gate_add.py index d8e3e0e45..32b46fe7c 100644 --- a/test/registered/jit/benchmark/diffusion/bench_residual_gate_add.py +++ b/test/registered/jit/benchmark/diffusion/bench_residual_gate_add.py @@ -9,7 +9,9 @@ from sglang.jit_kernel.diffusion.triton.scale_shift import fuse_scale_shift_kern from sglang.test.ci.ci_register import register_cuda_ci from sglang.utils import is_in_ci -register_cuda_ci(est_time=30, suite="base-b-kernel-benchmark-1-gpu-large") +register_cuda_ci( + est_time=30, stage="base-b-kernel-benchmark", runner_config="1-gpu-large" +) @dataclass(frozen=True) diff --git a/test/registered/jit/diffusion/test_causal_conv3d_cat_pad.py b/test/registered/jit/diffusion/test_causal_conv3d_cat_pad.py index 68afd07ac..2d93e652a 100644 --- a/test/registered/jit/diffusion/test_causal_conv3d_cat_pad.py +++ b/test/registered/jit/diffusion/test_causal_conv3d_cat_pad.py @@ -12,8 +12,8 @@ from sglang.jit_kernel.diffusion.triton.causal_conv3d_pad import ( from sglang.jit_kernel.utils import get_ci_test_range from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=45, suite="base-b-kernel-unit-1-gpu-large") -register_cuda_ci(est_time=45, suite="base-b-kernel-unit-1-gpu-b200") +register_cuda_ci(est_time=45, stage="base-b-kernel-unit", runner_config="1-gpu-large") +register_cuda_ci(est_time=45, stage="base-b-kernel-unit", runner_config="4-gpu-b200") DEVICE = "cuda" DTYPE = torch.bfloat16 diff --git a/test/registered/jit/diffusion/test_ltx2_ada_values.py b/test/registered/jit/diffusion/test_ltx2_ada_values.py index a9c5fd226..8ae4c4a30 100644 --- a/test/registered/jit/diffusion/test_ltx2_ada_values.py +++ b/test/registered/jit/diffusion/test_ltx2_ada_values.py @@ -6,7 +6,7 @@ import torch from sglang.jit_kernel.diffusion.triton.ltx2_ada_values import ltx2_ada_values9 from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=8, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=8, stage="base-b-kernel-unit", runner_config="1-gpu-large") DEVICE = "cuda" diff --git a/test/registered/jit/diffusion/test_residual_gate_add.py b/test/registered/jit/diffusion/test_residual_gate_add.py index 973fe8618..6c9b7aee1 100644 --- a/test/registered/jit/diffusion/test_residual_gate_add.py +++ b/test/registered/jit/diffusion/test_residual_gate_add.py @@ -9,8 +9,8 @@ from sglang.jit_kernel.diffusion.residual_gate_add import ( ) from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=30, suite="base-b-kernel-unit-1-gpu-large") -register_cuda_ci(est_time=30, suite="base-b-kernel-unit-1-gpu-b200") +register_cuda_ci(est_time=30, stage="base-b-kernel-unit", runner_config="1-gpu-large") +register_cuda_ci(est_time=30, stage="base-b-kernel-unit", runner_config="4-gpu-b200") CASES = [ diff --git a/test/registered/jit/test_cutedsl_dsv3_fused_a_gemm.py b/test/registered/jit/test_cutedsl_dsv3_fused_a_gemm.py index 83162b52d..398d965e4 100644 --- a/test/registered/jit/test_cutedsl_dsv3_fused_a_gemm.py +++ b/test/registered/jit/test_cutedsl_dsv3_fused_a_gemm.py @@ -9,7 +9,7 @@ from sglang.jit_kernel.cutedsl_dsv3_fused_a_gemm import dsv3_fused_a_gemm from sglang.jit_kernel.utils import get_jit_cuda_arch, is_hip_runtime from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=30, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=30, stage="base-b-kernel-unit", runner_config="1-gpu-large") # hd_in must be a multiple of 256; 6144/7168 cover the real fused-A shapes. HD_INS = [6144, 7168] diff --git a/test/registered/jit/test_dsv32_indexer_fusion.py b/test/registered/jit/test_dsv32_indexer_fusion.py index 596ad4d62..6c068b9ba 100644 --- a/test/registered/jit/test_dsv32_indexer_fusion.py +++ b/test/registered/jit/test_dsv32_indexer_fusion.py @@ -31,7 +31,7 @@ from sglang.test.ci.ci_register import register_cuda_ci _is_hip = is_hip() -register_cuda_ci(est_time=45, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=45, stage="base-b-kernel-unit", runner_config="1-gpu-large") register_cuda_ci(est_time=90, suite="nightly-kernel-1-gpu", nightly=True) HEAD_DIM = 128 diff --git a/test/registered/jit/test_dsv3_fused_a_gemm.py b/test/registered/jit/test_dsv3_fused_a_gemm.py index 5c34eef58..01308d55e 100644 --- a/test/registered/jit/test_dsv3_fused_a_gemm.py +++ b/test/registered/jit/test_dsv3_fused_a_gemm.py @@ -10,7 +10,7 @@ from sglang.jit_kernel.dsv3_fused_a_gemm import dsv3_fused_a_gemm from sglang.jit_kernel.utils import get_jit_cuda_arch, is_hip_runtime from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=30, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=30, stage="base-b-kernel-unit", runner_config="1-gpu-large") # hd_in must be a multiple of 256; 6144/7168 cover the real fused-A shapes. HD_INS = [6144, 7168] diff --git a/test/registered/jit/test_dsv3_router_gemm.py b/test/registered/jit/test_dsv3_router_gemm.py index c9638b7f8..c8535a211 100644 --- a/test/registered/jit/test_dsv3_router_gemm.py +++ b/test/registered/jit/test_dsv3_router_gemm.py @@ -9,7 +9,7 @@ from sglang.jit_kernel.dsv3_router_gemm import dsv3_router_gemm from sglang.jit_kernel.utils import get_jit_cuda_arch, is_hip_runtime from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=37, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=37, stage="base-b-kernel-unit", runner_config="1-gpu-large") register_cuda_ci(est_time=148, suite="nightly-kernel-1-gpu", nightly=True) HIDDEN_DIMS = [1024, 4096, 5120, 6144, 7168] diff --git a/test/registered/jit/test_silu_and_mul_scaled_fp4_experts_quant_packed.py b/test/registered/jit/test_silu_and_mul_scaled_fp4_experts_quant_packed.py index 9be9ba92e..f1c71bc65 100644 --- a/test/registered/jit/test_silu_and_mul_scaled_fp4_experts_quant_packed.py +++ b/test/registered/jit/test_silu_and_mul_scaled_fp4_experts_quant_packed.py @@ -47,7 +47,7 @@ from sglang.test.ci.ci_register import register_cuda_ci # The NVFP4 expert-quant kernels are Blackwell-only (sm100a), so this runs on # the B200 unit suite. -register_cuda_ci(est_time=20, suite="base-b-kernel-unit-1-gpu-b200") +register_cuda_ci(est_time=20, stage="base-b-kernel-unit", runner_config="4-gpu-b200") FLOAT8_E4M3_MAX = 448.0 FLOAT4_E2M1_MAX = 6.0 diff --git a/test/registered/jit/test_sparse_mla_q8kv8_prefill_sm90.py b/test/registered/jit/test_sparse_mla_q8kv8_prefill_sm90.py index 40727f3c6..97319199c 100644 --- a/test/registered/jit/test_sparse_mla_q8kv8_prefill_sm90.py +++ b/test/registered/jit/test_sparse_mla_q8kv8_prefill_sm90.py @@ -9,7 +9,7 @@ import torch from sglang.srt.utils import is_sm90_supported from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=120, suite="base-b-kernel-unit-1-gpu-large") +register_cuda_ci(est_time=120, stage="base-b-kernel-unit", runner_config="1-gpu-large") register_cuda_ci(est_time=300, suite="nightly-kernel-1-gpu", nightly=True) diff --git a/test/registered/jit/test_symm_mem_all_gather.py b/test/registered/jit/test_symm_mem_all_gather.py index b472f3917..069e018e9 100644 --- a/test/registered/jit/test_symm_mem_all_gather.py +++ b/test/registered/jit/test_symm_mem_all_gather.py @@ -34,7 +34,7 @@ from sglang.srt.distributed.device_communicators.triton_symm_mem_ag import ( ) from sglang.test.ci.ci_register import register_cuda_ci -register_cuda_ci(est_time=240, suite="base-b-kernel-unit-8-gpu-h200") +register_cuda_ci(est_time=240, stage="base-b-kernel-unit", runner_config="8-gpu-h200") register_cuda_ci(est_time=240, suite="nightly-kernel-8-gpu-h200", nightly=True) # ---------------------------------------------------------------------------