[NPU][bugfix] update low latency quantization input and update MXFP8 tests (#38831)
Co-authored-by: AndyLi429 <AndyLi429@noreply.gitcode.com>
This commit is contained in:
@@ -441,10 +441,14 @@ class _DeepEPDispatcherImplBase:
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config_map = {
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DispatcherOutputDtype.BF16: {
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"use_fp8": False,
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"use_mxfp4": False,
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"use_mxfp8": False,
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"use_nvfp4": False,
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},
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DispatcherOutputDtype.FP8: {
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"use_fp8": True,
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"use_mxfp4": False,
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"use_mxfp8": False,
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"use_nvfp4": False,
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},
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# Needed for Ascend A2/A3 NPU case,
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@@ -452,14 +456,26 @@ class _DeepEPDispatcherImplBase:
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# quantization will be performed in int8
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DispatcherOutputDtype.INT8: {
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"use_fp8": True,
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"use_mxfp4": False,
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"use_mxfp8": False,
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"use_nvfp4": False,
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},
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DispatcherOutputDtype.NVFP4: {
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"use_fp8": False,
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"use_mxfp4": False,
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"use_mxfp8": False,
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"use_nvfp4": True,
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},
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DispatcherOutputDtype.MXFP4: {
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"use_fp8": False,
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"use_mxfp4": True,
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"use_mxfp8": False,
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"use_nvfp4": False,
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},
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DispatcherOutputDtype.MXFP8: {
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"use_fp8": False,
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"use_mxfp4": False,
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"use_mxfp8": True,
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"use_nvfp4": False,
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},
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}
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@@ -470,6 +486,8 @@ class _DeepEPDispatcherImplBase:
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# Apply configuration
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config = config_map[self.deepep_output_dtype]
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self.use_fp8 = config["use_fp8"]
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self.use_mxfp4 = config["use_mxfp4"]
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self.use_mxfp8 = config["use_mxfp8"]
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self.use_nvfp4 = config["use_nvfp4"]
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# Handle environment variables
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@@ -478,33 +496,17 @@ class _DeepEPDispatcherImplBase:
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def _validate_and_adjust_dtype(self) -> None:
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"""Validate dtype against hardware and adjust if necessary."""
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self.low_latency_quant_mode = None
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self._low_latency_quant_mode_runtime_checked = False
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if self.deepep_output_dtype == DispatcherOutputDtype.MXFP8:
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if not _is_npu or self.dispatch_mode != DeepEPMode.LOW_LATENCY:
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raise RuntimeError(
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"MXFP8 DeepEP dispatch is supported only for A5 "
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"low-latency dispatch."
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)
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if _is_npu and self.deepep_output_dtype == DispatcherOutputDtype.FP8:
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from sglang.srt.hardware_backend.npu.utils import is_npu_arch35
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if not is_npu_arch35():
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raise RuntimeError(
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"MXFP8 DeepEP dispatch is supported only on Ascend A5 "
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"in low-latency mode."
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)
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self.low_latency_quant_mode = "mx_fp8_e4m3"
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return
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if _is_npu:
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if self.deepep_output_dtype == DispatcherOutputDtype.FP8:
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logger.warning_once(
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"Ascend A2/A3 NPU does not support fp8 "
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"deepep_dispatcher_output_dtype, switching to int8..."
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"deepep_dispatcher_output_dtype; DeepEP will use int8."
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)
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self.deepep_output_dtype = DispatcherOutputDtype.INT8
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elif self.deepep_output_dtype == DispatcherOutputDtype.NVFP4:
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if _is_npu:
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if self.deepep_output_dtype == DispatcherOutputDtype.NVFP4:
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raise RuntimeError(
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"Ascend A2/A3 NPU does not support nvfp4 deepep_dispatcher_output_dtype."
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)
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@@ -561,6 +563,40 @@ class _DeepEPDispatcherImplNormal(_DeepEPDispatcherImplBase):
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previous_event = Buffer.capture() if self.async_finish else None
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return hidden_states, topk_ids, topk_weights, previous_event
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def _get_quantization_kwargs(self, buffer: Buffer) -> dict:
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if not _is_npu:
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return {}
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dispatch_params = inspect.signature(buffer.dispatch).parameters
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flag_kwargs = {
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"use_fp8": self.use_fp8,
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"use_mxfp4": self.use_mxfp4,
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"use_mxfp8": self.use_mxfp8,
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}
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if all(name in dispatch_params for name in flag_kwargs):
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return flag_kwargs
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if "quant_mode" in dispatch_params:
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if self.use_mxfp4:
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quant_mode = "mx_fp4_e2m1"
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elif self.use_mxfp8:
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quant_mode = "mx_fp8_e4m3"
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elif self.use_fp8:
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quant_mode = "int8"
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else:
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quant_mode = "bf16"
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return {"quant_mode": quant_mode}
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if not self.use_mxfp4 and not self.use_mxfp8:
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# A3's legacy pybind Buffer does not expose its dispatch signature.
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# It selects BF16/INT8 dispatch through the DeepEP runtime instead.
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return {}
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raise RuntimeError(
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"Installed DeepEP normal dispatch does not support either "
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"use_fp8/use_mxfp4/use_mxfp8 or quant_mode."
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)
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def dispatch_b(self, hidden_states, topk_ids, topk_weights, previous_event):
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(
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hidden_states,
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@@ -610,6 +646,7 @@ class _DeepEPDispatcherImplNormal(_DeepEPDispatcherImplBase):
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# `handle` as a member variable works.
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_deepep_precompile_tp_barrier()
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npu_quantization_opts = self._get_quantization_kwargs(buffer)
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(
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recv_x,
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recv_topk_ids,
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@@ -630,6 +667,7 @@ class _DeepEPDispatcherImplNormal(_DeepEPDispatcherImplBase):
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allocate_on_comm_stream=(previous_event is not None) and self.async_finish,
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expert_alignment=128 if deep_gemm_wrapper.ENABLE_JIT_DEEPGEMM else 1,
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config=DeepEPConfig.get_instance().normal_dispatch_config,
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**npu_quantization_opts,
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)
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get_global_expert_distribution_recorder().on_deepep_dispatch_normal(
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num_recv_tokens_per_expert,
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@@ -774,9 +812,8 @@ class _DeepEPDispatcherImplLowLatency(_DeepEPDispatcherImplBase):
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):
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input_global_scale = self.quant_config.get("input_global_scale", None)
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# round_scale / use_ue8m0 are FP8-DeepGEMM specific; they cause DeepEP
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# to return int32-packed UE8M0 scales that don't feed the flashinfer
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# cutedsl kernel.
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# round_scale / use_ue8m0 are FP8-DeepGEMM specific. Dropping use_ue8m0
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# makes DeepEP return fp32 column-major scales the e8m0 cast cannot view.
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fp8_deepgemm_scale_opts = (
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dict(
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round_scale=deep_gemm_wrapper.ENABLE_JIT_DEEPGEMM
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@@ -789,58 +826,16 @@ class _DeepEPDispatcherImplLowLatency(_DeepEPDispatcherImplBase):
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)
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buffer = self._get_buffer()
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if (
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self.low_latency_quant_mode is not None
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and not self._low_latency_quant_mode_runtime_checked
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):
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try:
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dispatch_signature = inspect.signature(buffer.low_latency_dispatch)
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except (TypeError, ValueError) as exc:
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raise RuntimeError(
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"A5 MXFP8 DeepEP dispatch requires a recent "
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"sgl-kernel-npu/DeepEP runtime exposing "
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"low_latency_dispatch(..., quant_mode=...)."
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) from exc
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if "quant_mode" not in dispatch_signature.parameters:
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raise RuntimeError(
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"A5 MXFP8 DeepEP dispatch requires a recent "
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"sgl-kernel-npu/DeepEP runtime exposing "
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"low_latency_dispatch(..., quant_mode=...)."
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)
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self._low_latency_quant_mode_runtime_checked = True
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use_fp8 = self.use_fp8
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low_latency_quant_kwargs = {}
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if self.low_latency_quant_mode is not None:
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deep_use_mode = os.environ.get("DEEP_USE_MODE", "default")
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if deep_use_mode == "default":
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low_latency_quant_kwargs = {
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"quant_mode": self.low_latency_quant_mode,
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}
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elif deep_use_mode == "ops":
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# The ops strategy ignores quant_mode and uses the legacy
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# flags. Pass both forms so the request is explicit and the
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# strategy still produces E4M3 + E8M0 MXFP8 tensors.
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use_fp8 = True
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low_latency_quant_kwargs = {
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"quant_mode": self.low_latency_quant_mode,
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"use_ue8m0": True,
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}
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else:
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raise RuntimeError(
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"A5 MXFP8 DeepEP dispatch supports only "
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"DEEP_USE_MODE=default or DEEP_USE_MODE=ops; got "
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f"{deep_use_mode!r}."
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)
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_deepep_precompile_tp_barrier()
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npu_mxfp_quantization_opts = self._get_npu_mxfp_quantization_kwargs(buffer)
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packed_recv_hidden, self.packed_recv_count, self.handle, event, hook = (
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buffer.low_latency_dispatch(
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hidden_states,
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topk_ids,
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self.num_max_dispatch_tokens_per_rank,
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self.num_experts,
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use_fp8=use_fp8,
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**low_latency_quant_kwargs,
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use_fp8=self.use_fp8,
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**npu_mxfp_quantization_opts,
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**(
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dict(topk_weights=topk_weights)
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if _is_npu and not _use_zbal
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@@ -859,6 +854,28 @@ class _DeepEPDispatcherImplLowLatency(_DeepEPDispatcherImplBase):
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)
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return packed_recv_hidden, self.packed_recv_count, event, hook
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def _get_npu_mxfp_quantization_kwargs(self, buffer: Buffer) -> dict:
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if not _is_npu:
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return {}
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parameters = inspect.signature(buffer.low_latency_dispatch).parameters
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if any(
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parameter.kind is inspect.Parameter.VAR_KEYWORD
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for parameter in parameters.values()
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):
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return {
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"use_mxfp4": self.use_mxfp4,
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"use_mxfp8": self.use_mxfp8,
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}
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return {
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name: value
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for name, value in {
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"use_mxfp4": self.use_mxfp4,
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"use_mxfp8": self.use_mxfp8,
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}.items()
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if name in parameters
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}
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def combine_a(
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self,
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hidden_states: torch.Tensor,
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@@ -284,6 +284,7 @@ class DispatcherOutputDtype(Enum):
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- FP8: dispatch hidden states in fp8
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- INT8: dispatch hidden states in int8
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- NVFP4: dispatch hidden states in nvfp4
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- MXFP4: dispatch hidden states in mxfp4 (fp4_e2m1 + e8m0 block scale)
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- MXFP8: dispatch hidden states in mxfp8 (fp8_e4m3 + e8m0 block scale)
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"""
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@@ -291,6 +292,7 @@ class DispatcherOutputDtype(Enum):
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FP8 = "fp8"
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INT8 = "int8"
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NVFP4 = "nvfp4"
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MXFP4 = "mxfp4"
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MXFP8 = "mxfp8"
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