[Test] Prune redundant unified-memory allocator and pool tests (#38093)

test/registered/unit/server_args/test_page_major_backend_allowlist.py

@@ -13,30 +13,19 @@
 # ==============================================================================
 """`--enable-page-major-kv-layout` full-attention backend allowlist.
 
-Two-way gate (see `_handle_page_major_kv_layout`), because the unified pool
-exposes per-layer views and nothing else:
-  * unified-memory MLA models (`build_mla_views`) allow the whole wired
-    paged MLA family -- `fa3`, `flashinfer`'s MLA backend, `trtllm_mla` with
-    its `cutedsl_mla` / `tokenspeed_mla` subclasses, and `flashmla` (ps=64
-    snap);
-  * unified-memory MHA/SWA models (`build_mha_views`) allow `fa3` /
-    `fa4` / `flashinfer` / `trtllm_mha` alongside Triton;
-  * plain `--enable-page-major-kv-layout` without the unified pool keeps the
-    envelope-strided 4-D views only the stride-aware Triton kernels read.
+`handle_page_major_kv_layout` gates two ways, because the per-layer views the
+unified pool exposes are all the allowlisted backends can read: an MLA arm
+(`build_mla_views`), an MHA/SWA arm (`build_mha_views`), and no page-major arm
+at all without the unified pool. `fa3` is the resolved default on pre-Blackwell
+hosts, so its absence from an arm makes `--enable-unified-memory` fail to boot
+under its own default configuration.
 
-The same handler also screens the pool itself: the MHA/SWA per-layer views need
+The same handler screens the pool itself: the MHA/SWA per-layer views need
 uniform K/V rows, so an asymmetric-K/V model (MiMoV2: head_dim 192 !=
-v_head_dim 128) cannot run `--enable-unified-memory` at all and is rejected on
-EVERY backend, Triton included. MLA models are exempt -- their sub-pool keeps
-one latent row per layer, and several MLA configs (Kimi-Linear: head_dim 72,
-v_head_dim 128) report asymmetric dims while running the unified pool today.
-
-Pinned here so no arm silently widens to an unwired backend (`cutlass_mla`,
-`aiter`) and no arm silently narrows: `fa3` is the resolved default on
-pre-Blackwell hosts, so its absence from an arm makes `--enable-unified-memory`
-fail to boot under its own default configuration.
-
-    python -m pytest test/registered/unit/server_args/test_page_major_backend_allowlist.py -v
+v_head_dim 128) is rejected on EVERY backend, Triton included. MLA models are
+exempt -- their sub-pool keeps one latent row per layer, and real MLA configs
+(Kimi-Linear: head_dim 72, v_head_dim 128) report asymmetric dims while running
+the unified pool today.
 """
 
 import unittest
@@ -59,11 +48,8 @@ def _accepts(
     linear_prefill: str | None = None,
     has_asymmetric_kv: bool = False,
 ) -> bool:
-    """Run just `_handle_page_major_kv_layout` against a minimal stand-in.
-
-    ServerArgs' real constructor pulls in a model config; this exercises the
-    single handler under test with the fields it reads.
-    """
+    """Run just `handle_page_major_kv_layout` against a minimal stand-in, since
+    ServerArgs' real constructor pulls in a model config."""
     sa = ServerArgs.__new__(ServerArgs)
     for name, value in {
         "enable_unified_memory": unified,
@@ -145,21 +131,9 @@ class TestPageMajorBackendAllowlist(unittest.TestCase):
                 f"{backend} is an MLA kernel and must stay out of the MHA arm",
             )
 
-    def test_plain_page_major_arm_is_gated_at_boot(self):
-        """The strided views were removed: --enable-page-major-kv-layout
-        without --enable-unified-memory must be rejected up front for EVERY
-        backend, Triton included, until the per-layer-view reimplementation."""
-        for backend in ("triton",) + self.PER_LAYER_VIEW_MLA_BACKENDS:
-            for use_mla in (True, False):
-                self.assertFalse(
-                    _accepts(backend, use_mla=use_mla, unified=False),
-                    f"{backend} must be rejected on the static page-major arm",
-                )
-
     def test_asymmetric_kv_mha_model_cannot_use_unified_memory(self):
-        """head_dim != v_head_dim (MiMoV2): no uniform rows, so no per-layer views
-        and no unified pool. The rejection is the POOL's, not a backend's, so
-        it must fire on every backend -- Triton included."""
+        """The rejection is the POOL's, not a backend's, so it must fire on
+        every backend -- Triton included."""
         for backend in ("triton",) + self.PER_LAYER_VIEW_MHA_BACKENDS:
             self.assertFalse(
                 _accepts(backend, use_mla=False, has_asymmetric_kv=True),
@@ -168,10 +142,8 @@ class TestPageMajorBackendAllowlist(unittest.TestCase):
             )
 
     def test_asymmetric_dims_do_not_screen_out_mla(self):
-        """MLA stores one latent row per layer, so its K/V head dims never have
-        to agree -- and real MLA configs report them as unequal (Kimi-Linear:
-        head_dim 72, v_head_dim 128). Screening on `has_asymmetric_kv` alone
-        would lock every one of them out of the unified pool."""
+        """Screening on `has_asymmetric_kv` alone would lock every real MLA
+        config out of the unified pool."""
         for backend in ("triton",) + self.PER_LAYER_VIEW_MLA_BACKENDS:
             self.assertTrue(
                 _accepts(backend, use_mla=True, has_asymmetric_kv=True),
@@ -180,9 +152,8 @@ class TestPageMajorBackendAllowlist(unittest.TestCase):
             )
 
     def test_page_major_rejected_without_unified_memory(self):
-        """--enable-page-major-kv-layout without the unified pool is rejected
-        outright, Triton included: the static page-major arm went away with
-        the strided views and awaits its per-layer-view reimplementation."""
+        """There is no static page-major arm today, so the flag alone is
+        rejected outright -- Triton included."""
         for backend in ("triton",) + tuple(
             set(self.PER_LAYER_VIEW_MLA_BACKENDS + self.PER_LAYER_VIEW_MHA_BACKENDS)
         ):