[XPU]Enable HiSparse hierarchical sparse KV cache on Intel XPU (#32792)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
This commit is contained in:
@@ -5,11 +5,27 @@ from typing import Dict, List, NamedTuple, Optional, Tuple, Union
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import torch
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from sglang.kernels.ops.kvcache.hisparse import (
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copy_cache_planned_mla,
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load_cache_to_device_buffer_dsv4_mla,
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load_cache_to_device_buffer_mla,
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)
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from sglang.srt.utils import get_device_module, is_hip, is_xpu
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if is_xpu():
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from sgl_kernel import (
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load_cache_to_device_buffer_dsv4_mla,
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load_cache_to_device_buffer_mla,
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)
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def copy_cache_planned_mla(*args, **kwargs):
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raise RuntimeError(
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"HiSparse shared-index prefetch is unsupported on XPU: "
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"copy_cache_planned_mla has no AOT sgl_kernel implementation."
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)
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else:
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from sglang.kernels.ops.kvcache.hisparse import (
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copy_cache_planned_mla,
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load_cache_to_device_buffer_dsv4_mla,
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load_cache_to_device_buffer_mla,
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)
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from sglang.srt.configs.model_config import dsa_layer_skips_topk, is_deepseek_dsa
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from sglang.srt.environ import envs
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from sglang.srt.managers.schedule_batch import Req
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@@ -23,11 +39,11 @@ from sglang.srt.mem_cache.hisparse_memory_pool import (
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from sglang.srt.mem_cache.memory_pool import ReqToTokenPool
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from sglang.srt.mem_cache.memory_pool_host import DeepSeekV4PagedHostPool
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from sglang.srt.mem_cache.pool_host.mla import MLATokenToKVPoolHost
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from sglang.srt.utils import get_device_module, is_hip
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device_module = get_device_module()
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_is_hip = is_hip()
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_is_xpu = is_xpu()
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logger = logging.getLogger(__name__)
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@@ -133,6 +149,12 @@ class HiSparseCoordinator:
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# Timing probe: skip the host->device KV bytes to measure the "IO is
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# free" floor. Produces garbage output; benchmarking only.
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self.skip_io = envs.SGLANG_DEBUG_HISPARSE_SKIP_IO.get()
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if _is_xpu and self.skip_io:
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raise ValueError(
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"SGLANG_DEBUG_HISPARSE_SKIP_IO is unsupported on XPU: the AOT swap-in "
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"ops do not accept skip_io, so timings would silently include the KV "
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"copy."
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)
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self.compress_ratio = self.token_to_kv_pool_allocator.compress_ratio
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self.is_dsv4_hisparse = isinstance(
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@@ -281,6 +303,12 @@ class HiSparseCoordinator:
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layer_num,
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)
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shared_index_layers = None
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if shared_index_layers is not None and _is_xpu:
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logger.warning(
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"HiSparse shared-index prefetch disabled on XPU: "
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"copy_cache_planned_mla is unavailable; using synchronous swap-in."
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)
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shared_index_layers = None
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self._is_shared_index_layer = list(shared_index_layers or [False] * layer_num)
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self.enable_prefetch = any(self._is_shared_index_layer)
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self._prefetch_groups, self._prefetch_slot = _build_prefetch_groups(
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@@ -964,6 +992,7 @@ class HiSparseCoordinator:
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if record_plan
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else {}
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)
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skip_io_kwargs = {} if _is_xpu else dict(skip_io=self.skip_io)
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swap_in_fn(
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top_k_tokens=top_k_result,
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device_buffer_tokens=self.req_device_buffer_tokens[layer_id],
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@@ -981,7 +1010,7 @@ class HiSparseCoordinator:
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page_size=1,
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block_size=self.swap_in_block_size,
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num_real_reqs=self.num_real_reqs,
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skip_io=self.skip_io,
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**skip_io_kwargs,
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**plan,
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)
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return top_k_indices
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@@ -10,21 +10,22 @@ from sglang.kernels.ops.kvcache.hisparse_slot_mapping import (
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)
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from sglang.srt.layers.radix_attention import RadixAttention
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from sglang.srt.mem_cache.memory_pool import DSATokenToKVPool
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from sglang.srt.utils import is_cuda, is_hip
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from sglang.srt.utils import is_cuda, is_hip, is_xpu
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logger = logging.getLogger(__name__)
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# sgl_kernel.kvcacheio is only available in CUDA/ROCm sgl-kernel builds (not XPU/MPS/NPU/CPU).
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# sgl_kernel.kvcacheio is only available in CUDA/ROCm/XPU sgl-kernel builds (not MPS/NPU/CPU).
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_is_cuda = is_cuda()
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_is_hip = is_hip()
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if _is_cuda or _is_hip:
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_is_xpu = is_xpu()
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if _is_cuda or _is_hip or _is_xpu:
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from sgl_kernel.kvcacheio import transfer_kv_all_layer_mla
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else:
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def transfer_kv_all_layer_mla(*args, **kwargs):
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raise RuntimeError(
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"HiSparse device KV transfer requires sgl_kernel.kvcacheio (CUDA/ROCm). "
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"It is not available on this backend."
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"HiSparse device KV transfer requires sgl_kernel.kvcacheio "
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"(CUDA/ROCm/XPU). It is not available on this backend."
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)
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@@ -12,7 +12,6 @@ from sglang.kernels.ops.kvcache.hicache import (
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from sglang.kernels.ops.kvcache.hicache import (
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transfer_hicache_all_layer_mla_staged_lf_pf as jit_transfer_hicache_all_layer_mla_staged_lf_pf,
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)
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from sglang.kernels.ops.kvcache.hisparse import transfer_cache_dsv4_mla
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from sglang.srt.utils import is_cuda, is_hip, is_mps, is_npu, is_xpu
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_is_cuda = is_cuda()
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@@ -20,7 +19,11 @@ _is_hip = is_hip()
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_is_npu = is_npu()
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_is_xpu = is_xpu()
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_is_mps = is_mps()
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if _is_cuda or _is_hip:
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if _is_xpu:
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from sgl_kernel import transfer_cache_dsv4_mla
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else:
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from sglang.kernels.ops.kvcache.hisparse import transfer_cache_dsv4_mla
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if _is_cuda or _is_hip or _is_xpu:
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from sgl_kernel.kvcacheio import (
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transfer_kv_all_layer_direct_lf_pf,
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transfer_kv_all_layer_mla,
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@@ -315,5 +315,6 @@ ALLOC_MEMORY_FUNCS = defaultdict(
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{
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"npu": alloc_with_pin_memory,
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"musa": alloc_with_pin_memory,
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"xpu": alloc_with_pin_memory,
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},
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)
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@@ -47,7 +47,7 @@ _is_hip = is_hip()
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_is_npu = is_npu()
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_is_xpu = is_xpu()
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_is_mps = is_mps()
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if _is_cuda or _is_hip:
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if _is_cuda or _is_hip or _is_xpu:
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from sgl_kernel.kvcacheio import (
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transfer_kv_all_layer_direct_lf_pf,
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transfer_kv_all_layer_mla,
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