From caeb449cd62cf5e3903cb24c5f410f953ca4f7cd Mon Sep 17 00:00:00 2001 From: Zaili Wang <109502517+ZailiWang@users.noreply.github.com> Date: Sat, 6 Jun 2026 13:39:40 +0800 Subject: [PATCH] [Doc][CPU]Update Cookbook with Xeon support info (#27248) Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> --- .../DeepSeek/DeepSeek-OCR-2.mdx | 5 +- .../autoregressive/DeepSeek/DeepSeek-OCR.mdx | 2 + .../autoregressive/DeepSeek/DeepSeek-R1.mdx | 6 +- .../autoregressive/DeepSeek/DeepSeek-V3.mdx | 4 + .../autoregressive/DeepSeek/DeepSeek-V3_1.mdx | 4 + .../autoregressive/MiniMax/MiniMax-M2.7.mdx | 10 ++- .../autoregressive/Qwen/Qwen3-Coder-Next.mdx | 3 + .../autoregressive/Qwen/Qwen3-Coder.mdx | 7 +- .../autoregressive/Qwen/Qwen3-Next.mdx | 4 + .../cookbook/autoregressive/Qwen/Qwen3-VL.mdx | 6 +- .../cookbook/autoregressive/Qwen/Qwen3.5.mdx | 4 + .../cookbook/autoregressive/Qwen/Qwen3.6.mdx | 4 + .../Tencent/Hunyuan3-Preview.mdx | 4 + .../deepseek-ocr-deployment.jsx | 38 +++++++-- .../deepseek-ocr-v2-deployment.jsx | 23 ++++- .../deepseek-r1-basic-deployment.jsx | 56 ++++++++++-- .../autoregressive/deepseek-v3-deployment.jsx | 85 ++++++++++++++----- .../deepseek-v31-deployment.jsx | 65 ++++++++++---- .../hunyuan3-preview-deployment.jsx | 41 ++++++--- .../autoregressive/minimax-m27-deployment.jsx | 22 ++++- .../autoregressive/qwen3-coder-deployment.jsx | 33 ++++--- .../qwen3-coder-next-deployment.jsx | 17 +++- .../autoregressive/qwen3-next-deployment.jsx | 15 +++- .../autoregressive/qwen3-vl-deployment.jsx | 27 ++++-- .../autoregressive/qwen35-deployment.jsx | 51 +++++++---- .../autoregressive/qwen36-deployment.jsx | 28 ++++-- 26 files changed, 443 insertions(+), 121 deletions(-) diff --git a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR-2.mdx b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR-2.mdx index 9140f9c98..0ef83c3ff 100644 --- a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR-2.mdx +++ b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR-2.mdx @@ -30,13 +30,15 @@ For more details, please refer to the [official DeepSeek-OCR-2 repository](https Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. ### 3.1 Basic Configuration -**Interactive Command Generator**: Use the configuration selector below to automatically generate the appropriate deployment command for your hardware platform, quantization method, and deployment strategy. SGLang supports serving DeepSeek-OCR-2 on NVIDIA H200 and B200, and AMD MI300X, MI355X, and MI325X GPUs. +**Interactive Command Generator**: Use the configuration selector below to automatically generate the appropriate deployment command for your hardware platform, quantization method, and deployment strategy. SGLang supports serving DeepSeek-OCR-2 on NVIDIA H200 and B200, AMD MI300X, MI355X, and MI325X GPUs, as well as Intel Xeon CPUs. @@ -47,6 +49,7 @@ This section provides deployment configurations optimized for different hardware - **Single GPU Deployment:** DeepSeek-OCR-2 (~3B parameters) fits on a single modern GPU — no tensor parallelism required for low-latency serving. - **High Throughput:** For high-throughput scenarios, use data parallelism with the SGLang Model Gateway. See [DP, DPA and SGLang DP Router](../../../docs/advanced_features/sgl_model_gateway). - **NCCL timeout:** If model loading is slow, increase `--dist-timeout 3600`. +- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for NUMA binding settings. ## 4. Model Invocation diff --git a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR.mdx b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR.mdx index abe0802a2..ef8bc0caa 100644 --- a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR.mdx +++ b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-OCR.mdx @@ -26,6 +26,8 @@ For more details, please refer to the [official DeepSeek-OCR repository](https:/ Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. diff --git a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-R1.mdx b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-R1.mdx index 27a5e6f96..35a53ed22 100644 --- a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-R1.mdx +++ b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-R1.mdx @@ -15,7 +15,7 @@ import { DeepSeekR1AdvancedDeployment } from '/src/snippets/autoregressive/deeps - **Advanced Reasoning**: Built-in reasoning capabilities for complex problem-solving - **Multiple Quantizations**: FP8 and FP4 variants for different performance/memory trade-offs -- **Hardware Optimization**: Specifically tuned for NVIDIA B200 (Blackwell) and H200 (Hopper) GPUs, and AMD MI300X, MI325X and MI355X GPUs +- **Hardware Optimization**: Specifically tuned for NVIDIA B200 (Blackwell) and H200 (Hopper) GPUs, AMD MI300X, MI325X and MI355X GPUs, as well as Intel Xeon CPUs - **High Performance**: Optimized for both throughput and latency scenarios **Available Models:** @@ -37,6 +37,8 @@ For more details, please refer to the [official DeepSeek-R1 repository](https:// Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. @@ -97,6 +99,8 @@ python3 -m sglang.compile_deep_gemm --model deepseek-ai/DeepSeek-R1 --tp 8 --tru **NCCL timeout:** If model loading is slow, increase: `--dist-timeout 3600`. +For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3.mdx b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3.mdx index 56ef88247..49ca233aa 100644 --- a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3.mdx +++ b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3.mdx @@ -22,6 +22,8 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides a progressive guide from quick deployment to performance optimization, suitable for users at different levels. @@ -77,6 +79,8 @@ DeepGEMM is enabled by default on Hopper/Blackwell and can be disabled with `SGL **NCCL timeout:** If model loading is slow and you hit an NCCL timeout, increase it: `--dist-timeout 3600`. +For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3_1.mdx b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3_1.mdx index 1870e1b1e..03e322155 100644 --- a/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3_1.mdx +++ b/docs_new/cookbook/autoregressive/DeepSeek/DeepSeek-V3_1.mdx @@ -18,6 +18,8 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides a progressive guide from quick deployment to performance optimization, suitable for users at different levels. @@ -75,6 +77,8 @@ DeepGEMM is enabled by default on Hopper/Blackwell and can be disabled with `SGL **NCCL timeout:** If model loading is slow and you hit an NCCL timeout, increase it: `--dist-timeout 3600`. +For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/MiniMax/MiniMax-M2.7.mdx b/docs_new/cookbook/autoregressive/MiniMax/MiniMax-M2.7.mdx index a0dfeb1fd..5141361c5 100644 --- a/docs_new/cookbook/autoregressive/MiniMax/MiniMax-M2.7.mdx +++ b/docs_new/cookbook/autoregressive/MiniMax/MiniMax-M2.7.mdx @@ -1,7 +1,7 @@ --- title: MiniMax-M2.7 metatags: - description: "Deploy MiniMax-M2.7 with SGLang on NVIDIA and AMD GPUs — model self-evolution, professional software engineering, and native agent teams." + description: "Deploy MiniMax-M2.7 with SGLang on NVIDIA GPUs, AMD GPUs, and Intel Xeon CPUs — model self-evolution, professional software engineering, and native agent teams." tag: NEW --- @@ -26,6 +26,8 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + **Docker Images by Hardware Platform:** @@ -139,6 +141,12 @@ import { MiniMaxM27Deployment } from '/src/snippets/autoregressive/minimax-m27-d - **4-GPU deployment**: Requires 4× GPUs (e.g., MI300X, MI325X, MI355X) with TP=4, EP=4 - **8-GPU deployment**: Requires 8× GPUs (e.g., MI300X, MI325X, MI355X) with TP=8, EP=8 +**Hardware Requirements: Intel Xeon CPU** + +- It is recommended to run the model service on a Granite Rapids (GNR) AP 2-Socket server. + +- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder-Next.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder-Next.mdx index 001b2fa6e..a8908bd7b 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder-Next.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder-Next.mdx @@ -26,6 +26,8 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + **Note:** Qwen3-Coder-Next requires SGLang v0.5.8 or later. ## 3. Model Deployment @@ -46,6 +48,7 @@ This section provides a progressive guide from quick deployment to performance o - **Mamba Radix Cache**: Qwen3-Coder-Next's hybrid Gated Delta Networks architecture supports two mamba scheduling strategies via `--mamba-scheduler-strategy`: - **V1 (`no_buffer`)**: Default. No overlap scheduler, lower memory usage. - **V2 (`extra_buffer`)**: Enables overlap scheduling and branching point caching with `--mamba-scheduler-strategy extra_buffer --page-size 64`. Requires FLA kernel backend. Trades higher mamba state memory for better throughput. Strictly superior in non-KV-cache-bound scenarios; in KV-cache-bound cases, weigh the overlap scheduling benefit against reduced max concurrency. `--page-size` must satisfy `FLA_CHUNK_SIZE % page_size == 0` or `page_size % FLA_CHUNK_SIZE == 0` (`FLA_CHUNK_SIZE` is currently 64). +- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. ## 4. Model Invocation diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder.mdx index 848378279..862ae951f 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Coder.mdx @@ -28,9 +28,11 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment -This section provides deployment configurations verified on AMD MI300X, MI325X, MI355X and NVIDIA B200, GB200 hardware platforms. +This section provides deployment configurations verified on AMD MI300X, MI325X, MI355X, NVIDIA B200, GB200, and Intel Xeon CPU hardware platforms. ### 3.1 Configuration @@ -54,6 +56,9 @@ This section provides deployment configurations verified on AMD MI300X, MI325X, **General:** * **Tool Use**: To enable tool calling capabilities, add `--tool-call-parser qwen3_coder` to the launch command. +**Intel Xeon CPU:** +* For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Next.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Next.mdx index 18937969c..8f74a30a8 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3-Next.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3-Next.mdx @@ -32,6 +32,8 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. @@ -56,6 +58,8 @@ The Qwen3-Next series comes in only one size but offers different thinking modes - **V1 (`no_buffer`)**: Default. No overlap scheduler, lower memory usage. - **V2 (`extra_buffer`)**: Enables overlap scheduling and branching point caching with `--mamba-scheduler-strategy extra_buffer --page-size 64`. Requires FLA kernel backend. Trades higher mamba state memory for better throughput. Strictly superior in non-KV-cache-bound scenarios; in KV-cache-bound cases, weigh the overlap scheduling benefit against reduced max concurrency. `--page-size` must satisfy `FLA_CHUNK_SIZE % page_size == 0` or `page_size % FLA_CHUNK_SIZE == 0` (`FLA_CHUNK_SIZE` is currently 64). +- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3-VL.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3-VL.mdx index bdbb38743..f8945d403 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3-VL.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3-VL.mdx @@ -26,13 +26,15 @@ SGLang offers multiple installation methods. You can choose the most suitable in Please refer to the [official SGLang installation guide](../../../docs/get-started/install) for installation instructions. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. ### 3.1 Basic Configuration -The Qwen3-VL series offers models in various sizes and architectures, optimized for different hardware platforms including NVIDIA and AMD GPUs. The recommended launch configurations vary by hardware and model size. +The Qwen3-VL series offers models in various sizes and architectures, optimized for different hardware platforms including NVIDIA and AMD GPUs, as well as Intel Xeon CPUs. The recommended launch configurations vary by hardware and model size. **Interactive Command Generator**: Use the configuration selector below to automatically generate the appropriate deployment command for your hardware platform, model size, quantization method, and thinking capabilities. @@ -76,6 +78,8 @@ python -m sglang.launch_server \ --enable-metrics ``` +* For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3.5.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3.5.mdx index 458e4ac40..c82ce26f5 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3.5.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3.5.mdx @@ -111,6 +111,8 @@ docker pull lmsysorg/sglang:v0.5.9-rocm720-mi35x For the full Docker setup and other installation methods, please refer to the [official SGLang installation guide](../../../docs/get-started/install). +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. @@ -225,6 +227,8 @@ This section provides deployment configurations optimized for different hardware **FP8 KV Cache**: `--kv-cache-dtype fp8_e4m3` quantizes the KV cache to FP8 at runtime. Since these FP8 model checkpoints do not include pre-calibrated KV cache scaling factors, SGLang defaults to a scale of 1.0, which may cause noticeable accuracy degradation on reasoning-heavy tasks. It is not included in the generated commands above; add it manually only if memory constraints require the trade-off. +- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation **NVIDIA:** diff --git a/docs_new/cookbook/autoregressive/Qwen/Qwen3.6.mdx b/docs_new/cookbook/autoregressive/Qwen/Qwen3.6.mdx index 3a926d395..41db3b8e7 100644 --- a/docs_new/cookbook/autoregressive/Qwen/Qwen3.6.mdx +++ b/docs_new/cookbook/autoregressive/Qwen/Qwen3.6.mdx @@ -79,6 +79,8 @@ docker pull lmsysorg/sglang:latest For the full Docker setup and other installation methods, please refer to the [official SGLang installation guide](../../../docs/get-started/install). +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. @@ -141,6 +143,8 @@ All Qwen3.6 variants (MoE 35B-A3B and Dense 27B) fit on a single supported GPU a
+- For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation Deploy Qwen3.6 with the following command (H200, all features enabled). Swap `--model-path` to `Qwen/Qwen3.6-27B-FP8` for the dense 27B variant — all other flags carry over: diff --git a/docs_new/cookbook/autoregressive/Tencent/Hunyuan3-Preview.mdx b/docs_new/cookbook/autoregressive/Tencent/Hunyuan3-Preview.mdx index 84749039b..2780630ca 100644 --- a/docs_new/cookbook/autoregressive/Tencent/Hunyuan3-Preview.mdx +++ b/docs_new/cookbook/autoregressive/Tencent/Hunyuan3-Preview.mdx @@ -78,6 +78,8 @@ Please refer to the [official SGLang installation guide](../../../docs/get-start The `hy3-preview` tag bundles the HYV3 model code, the `hunyuan` tool-call / reasoning parsers, and the MTP draft-module runtime. +For SGLang CPU installation, please refer to the [CPU version installation guide](../../../docs/hardware-platforms/cpu_server#installation). + ## 3. Model Deployment This section provides deployment configurations optimized for different hardware platforms and use cases. @@ -167,6 +169,8 @@ SGLANG_ENABLE_SPEC_V2=1 sglang serve \ Toggle the "Speculative Decoding (MTP)" option in the generator above to add these flags automatically. Tune `num-steps` / `num-draft-tokens` based on acceptance rate in your workload. +For configuring CPU service, please refer to the `Notes` part in the serving engine launching section in [the SGLang CPU server document](../../../docs/hardware-platforms/cpu_server#launch-of-the-serving-engine) to better understand how to configure the arguments, especially for TP (tensor parallel) and NUMA binding settings. + ## 4. Model Invocation ### 4.1 Basic Usage diff --git a/docs_new/src/snippets/autoregressive/deepseek-ocr-deployment.jsx b/docs_new/src/snippets/autoregressive/deepseek-ocr-deployment.jsx index ce2b70b64..e80f979aa 100644 --- a/docs_new/src/snippets/autoregressive/deepseek-ocr-deployment.jsx +++ b/docs_new/src/snippets/autoregressive/deepseek-ocr-deployment.jsx @@ -7,7 +7,8 @@ export const DeepSeekOCRDeployment = () => { items: [ { id: 'mi300x', label: 'MI300X', default: true }, { id: 'mi325x', label: 'MI325X', default: false }, - { id: 'mi355x', label: 'MI355X', default: false } + { id: 'mi355x', label: 'MI355X', default: false }, + { id: 'xeon', label: 'XEON', default: false } ] }, quantization: { @@ -23,8 +24,8 @@ export const DeepSeekOCRDeployment = () => { type: 'checkbox', items: [ { id: 'tp', label: 'TP', subtitle: 'Tensor Parallel', default: true, required: true }, - { id: 'dp', label: 'DP', subtitle: 'Data Parallel', default: false }, - { id: 'ep', label: 'EP', subtitle: 'Expert Parallel', default: false } + { id: 'dp', label: 'DP', subtitle: 'Data Parallel', default: false, disabledWhen: (v) => v.hardware === 'xeon', disabledReason: 'Intel Xeon CPUs only support Tensor Parallel (TP)' }, + { id: 'ep', label: 'EP', subtitle: 'Expert Parallel', default: false, disabledWhen: (v) => v.hardware === 'xeon', disabledReason: 'Intel Xeon CPUs only support Tensor Parallel (TP)' } ] } }; @@ -63,7 +64,20 @@ export const DeepSeekOCRDeployment = () => { }, []); const handleRadioChange = (optionName, value) => { - setValues(prev => ({ ...prev, [optionName]: value })); + setValues(prev => { + const next = { ...prev, [optionName]: value }; + if (optionName === 'hardware') { + const strategyItems = options.strategy.items || []; + const current = Array.isArray(next.strategy) ? next.strategy : []; + next.strategy = current.filter(id => { + const item = strategyItems.find(s => s.id === id); + if (!item) return false; + if (typeof item.disabledWhen === 'function' && item.disabledWhen(next)) return false; + return true; + }); + } + return next; + }); }; const handleCheckboxChange = (optionName, itemId, isChecked) => { @@ -93,6 +107,9 @@ export const DeepSeekOCRDeployment = () => { let cmd = 'python3 -m sglang.launch_server \\\n'; cmd += ` --model-path ${modelPath}`; + if (hardware === 'xeon') { + cmd += ` \\\n --device cpu \\\n --disable-overlap-schedule`; + } cmd += ` \\\n --dtype float16`; // TP strategy @@ -110,7 +127,9 @@ export const DeepSeekOCRDeployment = () => { cmd += ` \\\n --ep 1`; } - cmd += ` \\\n --enable-symm-mem # Optional: improves performance, but may be unstable`; + if (hardware !== 'xeon') { + cmd += ` \\\n --enable-symm-mem # Optional: improves performance, but may be unstable`; + } return cmd; }; @@ -135,10 +154,11 @@ export const DeepSeekOCRDeployment = () => { {option.type === 'checkbox' ? ( option.items.map(item => { const isChecked = (values[option.name] || []).includes(item.id); - const isDisabled = item.required; - return ( -