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[AMD] Register 2 CPU-bound 1-GPU tests (phase_checker, scripted_runtime_core) for AMD PR CI (#30446)

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Michael
2026-07-08 14:04:23 -07:00
committed by GitHub
parent 10e7f2925f
commit c55190a638
2 changed files with 4 additions and 2 deletions
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test/registered/scripted_runtime/test_scripted_runtime_core.py
+2 -1
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@@ -1,7 +1,7 @@
import unittest import unittest
from sglang.srt.managers.schedule_batch import FINISH_ABORT from sglang.srt.managers.schedule_batch import FINISH_ABORT
from sglang.test.ci.ci_register import register_cuda_ci from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
from sglang.test.scripted_runtime.context import ScriptedContext from sglang.test.scripted_runtime.context import ScriptedContext
from sglang.test.scripted_runtime.http_server import ScriptedHttpServer from sglang.test.scripted_runtime.http_server import ScriptedHttpServer
from sglang.test.scripted_runtime.req_handle import ScriptedReqHandle from sglang.test.scripted_runtime.req_handle import ScriptedReqHandle
@@ -17,6 +17,7 @@ from sglang.test.scripted_runtime_chunked_helpers import (
from sglang.test.test_utils import CustomTestCase from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=460, stage="base-b", runner_config="1-gpu-small") register_cuda_ci(est_time=460, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=460, stage="stage-b", runner_config="1-gpu-small-amd")
_CHUNK_SIZE = 64 _CHUNK_SIZE = 64
test/registered/utils/test_phase_checker.py
+2 -1
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@@ -11,10 +11,11 @@ from enum import IntEnum
import torch import torch
from sglang.srt.utils.phase_checker import SimplePhaseChecker from sglang.srt.utils.phase_checker import SimplePhaseChecker
from sglang.test.ci.ci_register import register_cuda_ci from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
from sglang.test.test_utils import CustomTestCase from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=120, stage="base-b", runner_config="1-gpu-small") register_cuda_ci(est_time=120, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=120, stage="stage-b", runner_config="1-gpu-small-amd")
class _Phase(IntEnum): class _Phase(IntEnum):