[CI] Move CPU-only unit tests to the CPU suite and trim dead 5090 registrations (#33654)

test/registered/perf/test_vlm_perf_5090.py

@@ -2,61 +2,81 @@
 VLM Performance tests that work on 5090 (32GB) - VLM offline throughput and online latency tests.
 """
 
+import os
 import unittest
 
 from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 from sglang.test.test_utils import (
     DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST,
+    DEFAULT_URL_FOR_TEST,
     CustomTestCase,
+    auto_config_device,
+    get_benchmark_args,
     is_in_ci,
-    run_bench_serving,
+    run_bench_serving_multi,
     write_github_step_summary,
 )
 
-register_cuda_ci(est_time=406, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(est_time=180, stage="extra-a", runner_config="1-gpu-small")
-register_amd_ci(est_time=500, suite="stage-b-test-1-gpu-small-amd")
+register_amd_ci(est_time=300, suite="stage-b-test-1-gpu-small-amd")
+
+
+def _local_tokenizer_path():
+    # Prefer the local snapshot so the benchmark client's AutoTokenizer does
+    # not call the HF Hub API, which can stall for minutes in CI.
+    try:
+        from sglang.srt.utils import find_local_repo_dir
+
+        local_dir = find_local_repo_dir(
+            DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST, revision=None
+        )
+        if local_dir and os.path.isdir(local_dir):
+            return local_dir
+    except Exception:
+        pass
+    return None
 
 
 class TestVLMPerf5090(CustomTestCase):
-    def test_vlm_offline_throughput(self):
+    def test_vlm_perf(self):
-        res = run_bench_serving(
+        common = dict(
-            model=DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST,
+            base_url=DEFAULT_URL_FOR_TEST,
-            num_prompts=200,
-            request_rate=float("inf"),
-            other_server_args=[
-                "--mem-fraction-static",
-                "0.7",
-            ],
             dataset_name="mmmu",
+            dataset_path="",
+            tokenizer=_local_tokenizer_path(),
+            random_input_len=4096,
+            random_output_len=2048,
+            sharegpt_context_len=None,
+            disable_stream=False,
+            disable_ignore_eos=False,
+            seed=0,
+            device=auto_config_device(),
+            lora_name=None,
+        )
+        offline = get_benchmark_args(
+            num_prompts=200, request_rate=float("inf"), **common
+        )
+        # 50 prompts at 1 req/s keeps the online phase ~1 min; medians are
+        # stable at this sample size and the thresholds are loose ceilings.
+        online = get_benchmark_args(num_prompts=50, request_rate=1, **common)
+
+        (_, res_offline), (_, res_online) = run_bench_serving_multi(
+            DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST,
+            DEFAULT_URL_FOR_TEST,
+            other_server_args=["--mem-fraction-static", "0.7"],
+            benchmark_args=[offline, online],
         )
 
         if is_in_ci():
             write_github_step_summary(
-                f"### test_vlm_offline_throughput (5090)\n"
+                f"### test_vlm_perf (5090)\n"
-                f"Output throughput: {res['output_throughput']:.2f} token/s\n"
+                f"Output throughput: {res_offline['output_throughput']:.2f} token/s\n"
+                f"median_e2e_latency_ms: {res_online['median_e2e_latency_ms']:.2f} ms\n"
             )
-            self.assertGreater(res["output_throughput"], 2000)
+            self.assertGreater(res_offline["output_throughput"], 2000)
-
+            self.assertLess(res_online["median_e2e_latency_ms"], 16500)
-    def test_vlm_online_latency(self):
+            self.assertLess(res_online["median_ttft_ms"], 150)
-        res = run_bench_serving(
+            self.assertLess(res_online["median_itl_ms"], 8)
-            model=DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST,
-            num_prompts=250,
-            request_rate=1,
-            other_server_args=[
-                "--mem-fraction-static",
-                "0.7",
-            ],
-            dataset_name="mmmu",
-        )
-
-        if is_in_ci():
-            write_github_step_summary(
-                f"### test_vlm_online_latency (5090)\n"
-                f"median_e2e_latency_ms: {res['median_e2e_latency_ms']:.2f} ms\n"
-            )
-            self.assertLess(res["median_e2e_latency_ms"], 16500)
-            self.assertLess(res["median_ttft_ms"], 150)
-            self.assertLess(res["median_itl_ms"], 8)
 
 
 if __name__ == "__main__":

test/registered/unit/disaggregation/test_specv2_kvcache_offloading.py

@@ -18,10 +18,9 @@ from sglang.srt.disaggregation.decode_kvcache_offload_manager import (
 )
 from sglang.srt.disaggregation.kv_events import OffloadedState
 from sglang.srt.managers.cache_controller import HiCacheAck
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=8, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=8, suite="stage-b-test-1-gpu-small-amd")
 
 
 def _make_mock_req(

test/registered/unit/distributed/test_cuda_wrapper.py

@@ -2,10 +2,9 @@ import io
 
 import pytest
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=2, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=2, suite="base-a-test-cpu")
-register_amd_ci(est_time=2, stage="stage-b", runner_config="1-gpu-small-amd")
 
 from sglang.srt.distributed.device_communicators import cuda_wrapper
 

test/registered/unit/distributed/test_parallel_state.py

@@ -41,10 +41,9 @@ from unittest.mock import Mock, patch
 
 import pytest
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=8, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=8, suite="stage-b-test-1-gpu-small-amd")
 
 # Import the actual parallel_state module
 parallel_state = pytest.importorskip("sglang.srt.distributed.parallel_state")

test/registered/unit/layers/test_conv_layer.py

@@ -1,7 +1,6 @@
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=7, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=7, suite="base-a-test-cpu")
-register_amd_ci(est_time=7, suite="stage-b-test-1-gpu-small-amd")
 
 import unittest
 

test/registered/unit/lora/test_experimental_sgl_marlin_alignment.py

@@ -12,10 +12,13 @@ import torch
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=15, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=15,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="new inkling LoRA test; disabled on CI",
+)
 
-# Skipped on CI: newly-added inkling LoRA test, disabled pending stabilization.
-pytestmark = pytest.mark.skip(reason="new inkling LoRA test; disabled on CI")
 
 ALIGN_PATH = (
     Path(__file__).resolve().parents[4]

test/registered/unit/lora/test_experimental_sgl_marlin_multi_prefill.py

@@ -7,16 +7,17 @@ import torch
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=45, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=45,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="fused MoE LoRA-add kernel needs more opt-in shared memory than the ",
+)
 
 # The fused MoE LoRA-add kernel's shared-memory footprint exceeds the opt-in
 # ceiling of the small-GPU CI runner (~99 KiB on L4) at rank=128, so the
 # generic-fallback parity case OOMs there. Skip this file on CI rather than
 # shrink the production kernel to a small-GPU block config.
-pytestmark = pytest.mark.skip(
-    reason="fused MoE LoRA-add kernel needs more opt-in shared memory than the "
-    "small-GPU CI runner provides"
-)
 
 
 _CUDA_BF16_AVAILABLE = bool(

test/registered/unit/lora/test_experimental_sgl_marlin_policy.py

@@ -14,10 +14,12 @@ from sglang.srt.lora.marlin_lora_temp.policy import (
 from sglang.srt.lora.trtllm_lora_temp.specialized_expand import _get_gated_a_half
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
-
+    est_time=5,
-# Skipped on CI: newly-added inkling LoRA test, disabled pending stabilization.
+    stage="base-b",
-pytestmark = pytest.mark.skip(reason="new inkling LoRA test; disabled on CI")
+    runner_config="1-gpu-small",
+    disabled="new inkling LoRA test; disabled on CI",
+)
 
 
 def _config(**overrides):

test/registered/unit/lora/test_experimental_sgl_marlin_runtime_unit.py

@@ -13,10 +13,13 @@ import torch
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=5,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="new inkling LoRA test; disabled on CI",
+)
 
-# Skipped on CI: newly-added inkling LoRA test, disabled pending stabilization.
-pytestmark = pytest.mark.skip(reason="new inkling LoRA test; disabled on CI")
 
 REPO_ROOT = Path(__file__).resolve().parents[4]
 LORA_TEMP_ROOT = REPO_ROOT / "python/sglang/srt/lora"

test/registered/unit/lora/test_experimental_sgl_marlin_shared_outer_reduce.py

@@ -7,10 +7,12 @@ import torch
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=20, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
-
+    est_time=20,
-# Skipped on CI: newly-added inkling LoRA test, disabled pending stabilization.
+    stage="base-b",
-pytestmark = pytest.mark.skip(reason="new inkling LoRA test; disabled on CI")
+    runner_config="1-gpu-small",
+    disabled="new inkling LoRA test; disabled on CI",
+)
 
 
 _CUDA_BF16_AVAILABLE = bool(

test/registered/unit/lora/test_inkling_linearized_lora_unit.py

@@ -22,14 +22,15 @@ from torch import nn
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=5,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="refactor-fragile source-parsing unit test; skipped on CI",
+)
 
 # Skipped on CI: these hermetic checks AST-extract LoRAManager methods and re-run
 # them in a stubbed namespace, so they break whenever the manager's internal
-# call graph changes. Skip until they are rebuilt against a stable seam.
-pytestmark = pytest.mark.skip(
-    reason="refactor-fragile source-parsing unit test; skipped on CI"
-)
 
 REPO_ROOT = Path(__file__).resolve().parents[4]
 LORA_LAYERS_PATH = REPO_ROOT / "python/sglang/srt/lora/layers.py"

test/registered/unit/lora/test_inkling_lora_normalization_unit.py

@@ -11,10 +11,13 @@ import torch
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=1, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=1,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="new inkling LoRA test; disabled on CI",
+)
 
-# Skipped on CI: newly-added inkling LoRA test, disabled pending stabilization.
-pytestmark = pytest.mark.skip(reason="new inkling LoRA test; disabled on CI")
 
 REPO_ROOT = Path(__file__).resolve().parents[4]
 LORA_PATH = REPO_ROOT / "python/sglang/srt/lora/lora.py"

test/registered/unit/lora/test_inkling_moe_lora_overlap_unit.py

@@ -12,14 +12,15 @@ import pytest
 
 from sglang.test.ci.ci_register import register_cuda_ci
 
-register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small")
+register_cuda_ci(
+    est_time=5,
+    stage="base-b",
+    runner_config="1-gpu-small",
+    disabled="refactor-fragile source-parsing unit test; skipped on CI",
+)
 
 # Skipped on CI: this hermetic check re-parses the InklingMoE forward source and
 # pins its exact stream-order, so it breaks on unrelated refactors of that
-# method. Skip until it is rebuilt against a stable seam.
-pytestmark = pytest.mark.skip(
-    reason="refactor-fragile source-parsing unit test; skipped on CI"
-)
 
 REPO_ROOT = Path(__file__).resolve().parents[4]
 MOE_PATH = REPO_ROOT / "python/sglang/srt/models/inkling_common/moe.py"

test/registered/unit/lora/test_laguna_hidden_dim_unit.py

@@ -16,11 +16,10 @@ Usage:
     python -m pytest test/registered/unit/lora/test_laguna_hidden_dim_unit.py -v
 """
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
 # CPU-only unit test; no CUDA/distributed dependencies.
-register_cuda_ci(est_time=6, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=6, suite="base-a-test-cpu")
-register_amd_ci(est_time=6, suite="stage-b-test-1-gpu-small-amd")
 
 import unittest
 

test/registered/unit/lora/test_lora_moe_inplace_unit.py

@@ -21,11 +21,10 @@ Usage:
     python -m pytest test/registered/unit/lora/test_lora_moe_inplace_unit.py -v
 """
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
 # CPU-only unit test; no CUDA/distributed dependencies.
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=9, suite="base-a-test-cpu")
-register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
 
 import types
 import unittest

test/registered/unit/lora/test_mem_pool_ep_unit.py

@@ -13,11 +13,10 @@ Usage:
     python -m pytest test/registered/unit/lora/test_mem_pool_ep_unit.py -v
 """
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
 # CPU-only unit test; no CUDA/distributed dependencies.
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=9, suite="base-a-test-cpu")
-register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
 
 import ast
 import types

test/registered/unit/managers/test_embed_overrides.py

@@ -21,11 +21,10 @@ from sglang.srt.managers.tokenizer_manager_score_mixin import (
     TokenizerManagerScoreMixin,
 )
 from sglang.srt.server_args import MIS_DELIMITER_TOKEN_ID
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=9, suite="base-a-test-cpu")
-register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
 
 HIDDEN_DIM = 4
 

test/registered/unit/managers/test_mm_hashes.py

@@ -22,11 +22,10 @@ from sglang.srt.managers.schedule_batch import (
     MultimodalDataItem,
     _compute_pad_value,
 )
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=2, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=2, suite="base-a-test-cpu")
-register_amd_ci(est_time=2, suite="stage-b-test-1-gpu-small-amd")
 
 
 class TestMmHashesContract(CustomTestCase):

test/registered/unit/managers/test_mm_process_config.py

@@ -8,10 +8,10 @@ import torch
 
 from sglang.srt.environ import envs
 from sglang.srt.server_args import ServerArgs
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=9, suite="base-a-test-cpu")
 
 
 class TestMmProcessConfigValidation(CustomTestCase):

test/registered/unit/managers/test_prefill_adder.py

@@ -10,16 +10,10 @@ from sglang.srt.mem_cache.base_prefix_cache import (
 )
 from sglang.srt.server_args import ServerArgs, set_global_server_args_for_scheduler
 from sglang.srt.utils.common import Range
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=2, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 class _RecordingDelayer:

test/registered/unit/managers/test_priority_scheduling_disaggregation.py

@@ -16,10 +16,9 @@ from sglang.srt.disaggregation.utils import DisaggregationMode  # noqa: E402
 from sglang.srt.managers.schedule_batch import FINISH_ABORT, Req  # noqa: E402
 from sglang.srt.managers.scheduler import Scheduler  # noqa: E402
 from sglang.srt.runtime_context import get_context  # noqa: E402
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=5, suite="base-a-test-cpu")
-register_amd_ci(est_time=5, suite="stage-b-test-1-gpu-small-amd")
 
 
 class TestDisaggregationPriorityQueueing(unittest.TestCase):

test/registered/unit/managers/test_profile_merger_http_api.py

@@ -1,16 +1,10 @@
 import unittest
 
 from sglang.srt.managers.io_struct import ProfileReq
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=8, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 class TestProfileMergerHTTPAPI(CustomTestCase):

test/registered/unit/mem_cache/test_decode_radix_lock_ref.py

@@ -20,10 +20,9 @@ Usage:
     python -m pytest test/registered/unit/mem_cache/test_decode_radix_lock_ref.py -v
 """
 
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 
-register_cuda_ci(est_time=10, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=10, suite="base-a-test-cpu")
-register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
 
 import unittest
 from array import array

test/registered/unit/mem_cache/test_radix_cache_slru_accuracy.py

@@ -12,15 +12,9 @@ from sglang.srt.mem_cache.base_prefix_cache import (
 from sglang.srt.mem_cache.cache_init_params import CacheInitParams
 from sglang.srt.mem_cache.memory_pool import MHATokenToKVPool, ReqToTokenPool
 from sglang.srt.mem_cache.radix_cache import RadixCache, RadixKey
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 
-register_cuda_ci(est_time=8, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=8, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 class TestSLRUAccuracy(unittest.TestCase):

test/registered/unit/models/test_deepseek_mla_dispatch.py

@@ -18,11 +18,10 @@ from sglang.srt.models.deepseek_common import attention_backend_handler as abh
 from sglang.srt.models.deepseek_common.attention_forward_methods.forward_methods import (
     AttnForwardMethod,
 )
-from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
+from sglang.test.ci.ci_register import register_cpu_ci
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=10, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=10, suite="base-a-test-cpu")
-register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd-mi35x")
 
 
 def _fake_forward_batch(is_decode: bool):

test/registered/unit/models/test_llava.py

@@ -2,16 +2,10 @@ import unittest
 from unittest.mock import patch
 
 from sglang.srt.models.llava import AutoModel, LlavaForConditionalGeneration
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 class PixtralVisionConfig:

test/registered/unit/models/test_vit_pos_embed_interpolate.py

@@ -20,15 +20,10 @@ from types import SimpleNamespace
 import torch
 import torch.nn as nn
 
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_amd_ci, register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
 register_cpu_ci(est_time=20, suite="base-a-test-cpu")
-register_cuda_ci(est_time=20, stage="base-a", runner_config="1-gpu-small")
 register_amd_ci(est_time=20, stage="stage-a", runner_config="1-gpu-small-amd")
 
 NUM_POS = 2304  # Qwen3-VL num_position_embeddings -> 48x48 grid

test/registered/unit/multimodal/test_evs.py

@@ -3,16 +3,10 @@ from types import SimpleNamespace
 
 import pytest
 
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import run_doctests
 
-register_cuda_ci(est_time=11, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=20, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 def test_resolve_evs_config():

test/registered/unit/spec/test_eagle_worker_v2_topk1_fastpath.py

@@ -17,14 +17,9 @@ from sglang.srt.runtime_context import get_context
 from sglang.srt.speculative.adaptive_runtime_state import SpecRuntimeState
 from sglang.srt.speculative.eagle_utils import organize_draft_results
 from sglang.srt.speculative.eagle_worker_v2 import EagleDraftWorker, EAGLEWorkerV2
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_amd_ci, register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=20, stage="base-b", runner_config="1-gpu-small")
 register_amd_ci(est_time=20, stage="stage-b", runner_config="1-gpu-small-amd")
 
 

test/registered/unit/utils/test_profile_merger.py

@@ -15,16 +15,10 @@ import unittest
 
 from sglang.srt.managers.io_struct import ProfileReq, ProfileReqType
 from sglang.srt.utils.profile_merger import ProfileMerger
-from sglang.test.ci.ci_register import (
+from sglang.test.ci.ci_register import register_cpu_ci
-    register_amd_ci,
-    register_cpu_ci,
-    register_cuda_ci,
-)
 from sglang.test.test_utils import CustomTestCase
 
-register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
+register_cpu_ci(est_time=8, suite="base-a-test-cpu")
-register_amd_ci(est_time=8, suite="stage-b-test-1-gpu-small-amd")
-register_cpu_ci(est_time=8, suite="base-c-test-cpu")
 
 
 class TestProfileMerger(CustomTestCase):