[DeepSeek-V4] Fuse UE8M0 scale rounding into FP8 group quantization (#26766)
Co-authored-by: liqichao <liqichao@baidu.com> Co-authored-by: yhyang201 <yhyang201@gmail.com>
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liqichao
yhyang201
parent
27a374eaef
commit
bea282cede
@@ -214,7 +214,7 @@ template <
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bool SCALE_UE8M0,
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bool FUSE_SILU_AND_MUL,
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bool kUsePDL,
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typename scale_packed_t = std::conditional_t<SCALE_UE8M0, uint32_t, float>>
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typename scale_packed_t = std::conditional_t<SCALE_UE8M0 && IS_COLUMN_MAJOR, uint32_t, float>>
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__global__ void per_token_group_quant_8bit_v2_kernel(
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const T* __restrict__ input,
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DST_DTYPE* __restrict__ output_q,
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@@ -226,7 +226,7 @@ __global__ void per_token_group_quant_8bit_v2_kernel(
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const int scale_hidden_stride,
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const int num_tokens_per_expert) {
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using dst_dtype_info = DtypeInfo<DST_DTYPE>;
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using scale_element_t = std::conditional_t<SCALE_UE8M0, uint8_t, float>;
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using scale_element_t = std::conditional_t<SCALE_UE8M0 && IS_COLUMN_MAJOR, uint8_t, float>;
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static_assert(sizeof(scale_packed_t) % sizeof(scale_element_t) == 0);
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device::PDLWaitPrimary<kUsePDL>();
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@@ -279,8 +279,8 @@ __global__ void per_token_group_quant_8bit_v2_kernel(
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hidden_idx_packed * scale_hidden_stride * num_elems_per_pack +
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token_idx * scale_token_stride * num_elems_per_pack + pack_idx);
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} else {
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static_assert(!SCALE_UE8M0);
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scale_output = output_s + offset_num_groups;
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static_assert(!SCALE_UE8M0 || std::is_same_v<scale_packed_t, float>);
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scale_output = reinterpret_cast<scale_element_t*>(output_s) + offset_num_groups;
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}
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if constexpr (IS_COLUMN_MAJOR and SCALE_UE8M0) {
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@@ -309,12 +309,16 @@ __global__ void per_token_group_quant_8bit_v2_kernel(
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local_absmax = GroupReduceMax<THREADS_PER_SUBWARP>(local_absmax);
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float y_scale, y_scale_inv;
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// When SCALE_UE8M0, always quantize with the rounded (power-of-2) scale
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// — not with the exact scale followed by post-hoc rounding.
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// This matches the official DeepSeek-V4 kernel.py act_quant(scale_fmt="ue8m0")
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// and avoids a scale mismatch between quantization and downstream GEMM dequant,
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// which otherwise amplifies error ~14x and degrades EAGLE accept rate on Blackwell.
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calculate_fp8_scales<SCALE_UE8M0, dst_dtype_info>(local_absmax, y_scale, y_scale_inv);
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float2 y_scale_repeated = {y_scale, y_scale};
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if (lane_id == 0) {
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*scale_output = extract_required_scale_format<SCALE_UE8M0>(y_scale_inv);
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*scale_output = extract_required_scale_format < SCALE_UE8M0 && IS_COLUMN_MAJOR > (y_scale_inv);
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}
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float2 y_scale_repeated = {y_scale, y_scale};
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int4 output_buf;
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if constexpr (std::is_same_v<DST_DTYPE, fp8_e4m3_t>) {
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@@ -378,7 +382,7 @@ struct PerTokenGroupQuant8bitV2Kernel {
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void* output_q,
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void* output_s,
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const int32_t* masked_m) {
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using scale_packed_t = std::conditional_t<SCALE_UE8M0, uint32_t, float>;
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using scale_packed_t = std::conditional_t<SCALE_UE8M0 && IS_COLUMN_MAJOR, uint32_t, float>;
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auto kernel = per_token_group_quant_8bit_v2_kernel<
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SCHEDULER,
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GROUP_SIZE,
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@@ -463,7 +467,11 @@ struct PerTokenGroupQuant8bitV2Kernel {
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launch_with_config(TypeTag<NaiveScheduler>{}, std::true_type{}, std::false_type{}, std::false_type{});
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}
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} else {
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launch_with_config(TypeTag<NaiveScheduler>{}, std::false_type{}, std::false_type{}, std::false_type{});
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if (scale_ue8m0) {
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launch_with_config(TypeTag<NaiveScheduler>{}, std::false_type{}, std::true_type{}, std::false_type{});
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} else {
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launch_with_config(TypeTag<NaiveScheduler>{}, std::false_type{}, std::false_type{}, std::false_type{});
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}
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}
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}
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@@ -464,17 +464,29 @@ def create_per_token_group_quant_fp8_output_scale(
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scale_ue8m0: bool,
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):
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if scale_ue8m0:
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assert column_major_scales and scale_tma_aligned
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*x_batch, x_q_mn, x_q_k = x_shape
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x_s_mn, x_s_k = x_q_mn, x_q_k // 128
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aligned_mn = ceil_align(x_s_mn, 4)
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aligned_k = ceil_align(x_s_k, 4)
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# TODO(FIXME): Fix cuda kernel and recover here to empty.
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return torch.empty(
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(*x_batch, aligned_k // 4, aligned_mn),
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device=device,
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dtype=torch.int,
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).transpose(-1, -2)[..., :x_s_mn, :]
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if column_major_scales and scale_tma_aligned:
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*x_batch, x_q_mn, x_q_k = x_shape
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x_s_mn, x_s_k = x_q_mn, x_q_k // 128
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aligned_mn = ceil_align(x_s_mn, 4)
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aligned_k = ceil_align(x_s_k, 4)
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# TODO(FIXME): Fix cuda kernel and recover here to empty.
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return torch.empty(
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(*x_batch, aligned_k // 4, aligned_mn),
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device=device,
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dtype=torch.int,
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).transpose(-1, -2)[..., :x_s_mn, :]
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else:
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assert not column_major_scales, (
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"column_major_scales requires scale_tma_aligned=True "
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"when scale_ue8m0 is enabled"
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)
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# Row-major UE8M0 keeps the scale as float32 power-of-two values,
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# matching deep_gemm.ceil_to_ue8m0 and deep_gemm.fp8_einsum.
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return torch.empty(
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x_shape[:-1] + (x_shape[-1] // group_size,),
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device=device,
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dtype=torch.float32,
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)
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elif column_major_scales:
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if scale_tma_aligned:
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# TODO extract "align" function
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@@ -1066,8 +1066,8 @@ class MQALayer(nn.Module):
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o_fp8, o_s = sglang_per_token_group_quant_fp8(
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o.reshape(T * G, D).contiguous(),
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group_size=128,
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scale_ue8m0=True,
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)
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o_s = deep_gemm.ceil_to_ue8m0(o_s)
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output = torch.empty(T, G, R, device=o.device, dtype=torch.bfloat16)
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deep_gemm.fp8_einsum(
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"bhr,hdr->bhd",
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