[AMD] Add gfx1151 (Strix Halo / Ryzen AI MAX+) Docker image (#33939)
Co-authored-by: Hubert Lu <Hubert.Lu@amd.com>
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#!/bin/sh
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# Teach python/sglang/kernels/aot/setup_rocm.py to build for gfx1151 (Strix Halo).
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# Applied at image-build time by docker/rocm-gfx1151.Dockerfile; the repo files are
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# left untouched because gfx1151 is not a supported SGLang target.
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#
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# Two changes:
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# 1. Lift the {gfx942, gfx950, gfx1250} allowlist, which otherwise sys.exit(1)s.
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# Current main gives non-gfx942 targets a 40KB TopK dynamic-LDS budget,
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# which already fits gfx1151's 64KB workgroup limit.
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# 2. Force a single WARP_SIZE across the host and device compiler passes.
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# include/utils.h resolves WARP_SIZE to 64 whenever __HIP_DEVICE_COMPILE__
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# is undefined -- i.e. on the host pass -- and to 32 on a non-__GFX9__
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# device pass. On CDNA both come out 64 and nothing is wrong, which is why
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# upstream never sees this. On gfx1151 the two passes disagree, and the MoE
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# TopK kernels use WARP_SIZE on both sides of the launch:
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# moe_topk_softmax_kernels.cu __launch_bounds__(WARPS_PER_CTA * WARP_SIZE) -> device, 4*32 = 128
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# moe_topk_softmax_kernels.cu dim3 block_dim(WARP_SIZE, WARPS_PER_TB) -> host, 64*4 = 256
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# Launching 256 threads into a 128-thread bound fails with
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# hipErrorLaunchFailure, poisons the queue, and typically surfaces as a
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# page fault in whatever kernel runs next (moe_align_block_size_kernel),
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# which makes it easy to misattribute. The same pattern is in
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# moe_topk_sigmoid_kernels.cu. It also desynchronizes the launcher's
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# TopkConstants math (ROWS_PER_WARP, VECs_PER_THREAD) from the kernel's.
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# Only MoE models hit this; dense models never call these kernels.
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# 32 is simply correct here -- gfx1151 is a wave32 part -- so the override
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# pins both passes to 32 rather than renaming the symbol per call site.
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#
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# Each edit is guarded: if the upstream line has changed, fail rather than
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# silently produce an image whose kernels were built with the wrong limits.
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set -e
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FILE="${1:?usage: sgl-kernel-gfx1151.sh <path to setup_rocm.py>}"
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UTILS="$(dirname "${FILE}")/include/utils.h"
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GATE_OLD='if amdgpu_target not in ["gfx942", "gfx950", "gfx1250"]:'
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GATE_NEW='if amdgpu_target not in ["gfx942", "gfx950", "gfx1250", "gfx1151"]:'
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FLAGS_OLD=' f"-DSGL_TOPK_DYNAMIC_SMEM_BYTES={topk_dynamic_smem_bytes}",'
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FLAGS_NEW=' f"-DSGL_TOPK_DYNAMIC_SMEM_BYTES={topk_dynamic_smem_bytes}",
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# gfx1151 is wave32; pin both compiler passes to it (see utils.h below).
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*(["-DSGL_ROCM_WARP_SIZE=32"] if amdgpu_target == "gfx1151" else []),'
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WARP_OLD='#if defined(__GFX9__) || !defined(__HIP_DEVICE_COMPILE__)
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#define WARP_SIZE 64'
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WARP_NEW='#if defined(SGL_ROCM_WARP_SIZE)
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#define WARP_SIZE SGL_ROCM_WARP_SIZE
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#elif defined(__GFX9__) || !defined(__HIP_DEVICE_COMPILE__)
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#define WARP_SIZE 64'
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for pattern in "${GATE_OLD}" "${FLAGS_OLD}"; do
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if ! grep -qF "${pattern}" "${FILE}"; then
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echo "ERROR: expected line not found in ${FILE}:" >&2
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echo " ${pattern}" >&2
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echo "setup_rocm.py changed upstream; re-check this patch before building." >&2
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exit 1
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fi
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done
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if ! grep -qF "${WARP_OLD}" "${UTILS}"; then
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echo "ERROR: expected WARP_SIZE block not found in ${UTILS}." >&2
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echo "utils.h changed upstream; re-check the wave32 fix before building." >&2
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exit 1
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fi
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python3 - "${UTILS}" "${WARP_OLD}" "${WARP_NEW}" <<'PY'
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import sys
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path, old, new = sys.argv[1:4]
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with open(path) as f:
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src = f.read()
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with open(path, "w") as f:
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f.write(src.replace(old, new, 1))
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PY
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python3 - "${FILE}" "${GATE_OLD}" "${GATE_NEW}" "${FLAGS_OLD}" "${FLAGS_NEW}" <<'PY'
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import sys
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path, gate_old, gate_new, flags_old, flags_new = sys.argv[1:6]
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with open(path) as f:
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src = f.read()
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src = src.replace(gate_old, gate_new)
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src = src.replace(flags_old, flags_new, 1)
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with open(path, "w") as f:
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f.write(src)
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PY
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echo "Patched ${FILE} for gfx1151:"
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grep -nF -e "${GATE_NEW}" -e "SGL_ROCM_WARP_SIZE" "${FILE}"
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echo "Patched ${UTILS} for wave32:"
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grep -nF "SGL_ROCM_WARP_SIZE" "${UTILS}"
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@@ -0,0 +1,156 @@
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# SGLang for AMD Strix Halo / Ryzen AI MAX+ (gfx1151, RDNA3.5 iGPU).
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#
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# This is NOT a variant of docker/rocm.Dockerfile. That file targets CDNA
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# (gfx942/gfx950) and includes components which do not support gfx1151. This
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# image starts from AMD's stable ROCm/PyTorch image with native gfx1151 support.
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#
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# Build:
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# docker build -f docker/rocm-gfx1151.Dockerfile -t sglang-rocm:gfx1151 .
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#
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# Run (Strix Halo has no discrete VRAM; the GPU carves out of system RAM):
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# docker run -it --rm \
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# --device=/dev/kfd --device=/dev/dri \
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# --group-add video --group-add render \
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# --security-opt seccomp=unconfined \
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# --ipc=host --shm-size 16g \
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# -p 30000:30000 \
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# -v ~/.cache/huggingface:/root/.cache/huggingface \
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# sglang-rocm:gfx1151 \
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# python3 -m sglang.launch_server --model-path <model> \
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# --attention-backend triton --host 0.0.0.0
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# ROCm 7.2.4 / PyTorch 2.9.1 is AMD's stable gfx1151-supported combination.
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# Pin the image digest so rebuilding cannot silently change the toolchain.
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ARG BASE_IMAGE="rocm/pytorch@sha256:7fe531fa185af260352fe7fbb3fa64ad749abe72adf0600a648c4692801b125a"
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# =============================================================================
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# Stage 1: stable ROCm + PyTorch for gfx1151.
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# Pullable and testable on its own:
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# docker build --target rocm-torch -f docker/rocm-gfx1151.Dockerfile -t rocm-torch:gfx1151 .
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# =============================================================================
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FROM ${BASE_IMAGE} AS rocm-torch
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ARG GPU_ARCH=gfx1151
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ENV DEBIAN_FRONTEND=noninteractive
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ENV PYTHONUNBUFFERED=1
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RUN apt-get update && apt-get install -y --no-install-recommends \
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cmake \
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libnuma-dev \
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&& rm -rf /var/lib/apt/lists/*
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ENV PYTORCH_ROCM_ARCH=${GPU_ARCH}
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# ROCDXG requires this under WSL. It is inert when /dev/dxg is absent.
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ENV HSA_ENABLE_DXG_DETECTION=1
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# Fail loudly if the base image or its expected development toolchain changes.
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RUN python3 -c "import torch; print('torch', torch.__version__); assert torch.version.hip" \
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&& test -x /opt/rocm/bin/hipcc
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# =============================================================================
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# Stage 2: SGLang on top of the gfx1151 ROCm stack.
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# =============================================================================
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FROM rocm-torch AS sglang
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ARG GPU_ARCH=gfx1151
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# sgl-kernel's ROCm build (python/sglang/kernels/aot/setup_rocm.py) only accepts
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# gfx942/gfx950/gfx1250 and hard-exits on anything else; the patch below lifts
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# that gate. Set to 0 to skip the AOT kernels entirely and run Triton-only.
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ARG BUILD_SGL_KERNEL=1
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ARG MAX_JOBS=12
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WORKDIR /sgl-workspace
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# setuptools-rust builds the sglang-mm extension during the pip install below.
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ENV PATH="/root/.cargo/bin:${PATH}"
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RUN curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y --profile minimal \
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&& rustc --version
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ENV CARGO_BUILD_JOBS=8
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COPY . /sgl-workspace/sglang
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# pyproject.toml pins the CUDA stack (torch, flashinfer[cu13], cuda-python,
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# ...). pyproject_other.toml carries the srt_hip extra, which is
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# torch-version-agnostic -- same swap docker/rocm.Dockerfile performs.
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RUN cd /sgl-workspace/sglang \
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&& rm -f python/pyproject.toml \
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&& mv python/pyproject_other.toml python/pyproject.toml
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# One problem in setup_rocm.py for this target, plus one in include/utils.h:
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# the arch gate sys.exit(1)s outside {gfx942, gfx950, gfx1250}, and WARP_SIZE
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# resolves to 64 on the host pass but 32 on the device pass for a wave32 part,
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# which mismatches the MoE TopK launch bounds. Current main already limits
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# non-gfx942 TopK dynamic LDS to 40KB, which fits gfx1151's 64KB limit. The
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# remaining two problems are fixed here rather than upstream:
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# gfx1151 is not a supported SGLang target, and the sources themselves compile
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# clean for it. Each edit greps for the expected text first, so a rewrite
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# upstream breaks the build loudly instead of silently misconfiguring kernels.
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COPY docker/patches/sgl-kernel-gfx1151.sh /tmp/sgl-kernel-gfx1151.sh
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RUN cd /sgl-workspace/sglang/python/sglang/kernels/aot \
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&& if [ "${BUILD_SGL_KERNEL}" = "1" ]; then \
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rm -f pyproject.toml \
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&& mv pyproject_rocm.toml pyproject.toml \
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&& sh /tmp/sgl-kernel-gfx1151.sh setup_rocm.py \
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&& AMDGPU_TARGET=${GPU_ARCH} MAX_JOBS=${MAX_JOBS} python3 setup_rocm.py install; \
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else \
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echo "Skipping sgl-kernel build (BUILD_SGL_KERNEL=0)"; \
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fi
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# Current main composes extras through self-references
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# (srt_hip -> sglang[runtime_common] -> sglang[runtime_base]). pip's resolver
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# recursively walks that cycle from an editable source checkout. Flatten those
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# three groups before installing the package itself without dependency solving.
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# Keep compressed-tensors at its last torch-2.9-compatible release.
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RUN cd /sgl-workspace/sglang \
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&& python3 - <<'PY'
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import subprocess
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import sys
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import tomllib
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from pathlib import Path
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project = tomllib.loads(Path("python/pyproject.toml").read_text())["project"]
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extras = project["optional-dependencies"]
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requirements = list(project["dependencies"])
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for group in ("runtime_base", "runtime_common", "srt_hip"):
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requirements.extend(
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"compressed-tensors==0.15.0"
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if requirement == "compressed-tensors"
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else requirement
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for requirement in extras[group]
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if not requirement.startswith("sglang[") and requirement != "torch"
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)
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requirements = list(dict.fromkeys(requirements))
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subprocess.check_call(
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[sys.executable, "-m", "pip", "install", "--no-cache-dir", *requirements]
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)
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PY
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RUN cd /sgl-workspace/sglang \
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&& pip install --no-cache-dir --no-deps -e python
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# aiter is not optional on ROCm despite being CDNA-oriented:
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# sglang/srt/layers/quantization/__init__.py imports quark, which imports
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# aiter.ops.triton at module scope, so `import sglang.srt.layers.activation`
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# fails outright without it. Installed WITHOUT PREBUILD_KERNELS -- that step
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# AOT-compiles the CDNA assembly kernels and is what actually fails on gfx1151.
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# In JIT mode aiter builds module_aiter_core for gfx1151 on demand instead.
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ARG AITER_REPO="https://github.com/ROCm/aiter.git"
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ARG AITER_COMMIT="c16d44b93a528b2a4bfd6d8d3409116d465872a9"
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RUN git clone --recursive ${AITER_REPO} /sgl-workspace/aiter \
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&& cd /sgl-workspace/aiter \
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&& git checkout ${AITER_COMMIT} \
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&& git submodule update --init --recursive \
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&& GPU_ARCHS=${GPU_ARCH} pip install --no-cache-dir --no-build-isolation \
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--config-settings editable_mode=compat -e .
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# aiter's compiled attention/MoE kernels are CDNA-only; keep sglang on the
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# Triton paths. ServerArgs defaults to aiter on ROCm, so callers must pass
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# `--attention-backend triton` until the RDNA default is fixed upstream.
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# This is load-bearing beyond attention: aiter's RMSNorm uses v_pk_mul_f32,
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# a CDNA-only instruction, and its CK attention templates assume wave64.
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ENV SGLANG_USE_AITER=0
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WORKDIR /sgl-workspace/sglang
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CMD ["/bin/bash"]
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