[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

This commit is contained in:
Liangsheng Yin
2026-05-15 18:26:55 -07:00
committed by GitHub
parent d0c38329b2
commit b7d62bd724
473 changed files with 745 additions and 746 deletions
+1 -1
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@@ -10,7 +10,7 @@ from pathlib import Path
from sglang.srt.utils.log_utils import create_log_targets, log_json
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=6, suite="stage-a-test-cpu")
register_cpu_ci(est_time=6, suite="base-a-test-cpu")
_LOG_PREFIX_RE = re.compile(r"^\[\d{4}-\d{2}-\d{2} \d{2}:\d{2}:\d{2}\] ")
@@ -6,7 +6,7 @@ from sglang.srt.server_args import PortArgs, ServerArgs
from sglang.srt.utils.network import NetworkAddress
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
# Mock get_device() so ServerArgs tests run on CPU-only CI runners
_mock_device = patch("sglang.srt.server_args.get_device", return_value="cuda")
+3 -3
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@@ -9,9 +9,9 @@ from sglang.srt.utils.numa_utils import (
)
from sglang.test.ci.ci_register import register_cpu_ci, register_cuda_ci
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cuda_ci(est_time=10, stage="stage-c", runner_config="4-gpu-gb200")
register_cuda_ci(est_time=10, stage="stage-c", runner_config="8-gpu-b200")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
register_cuda_ci(est_time=10, stage="base-c", runner_config="4-gpu-gb200")
register_cuda_ci(est_time=10, stage="base-c", runner_config="8-gpu-b200")
class TestIsNumaAvailable(unittest.TestCase):
+1 -1
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@@ -15,7 +15,7 @@ from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
from sglang.utils import normalize_base_url, release_port, reserve_port
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestTryBindSocket(CustomTestCase):