[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

This commit is contained in:
Liangsheng Yin
2026-05-15 18:26:55 -07:00
committed by GitHub
parent d0c38329b2
commit b7d62bd724
473 changed files with 745 additions and 746 deletions
@@ -18,7 +18,7 @@ from sglang.srt.parser.code_completion_parser import (
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestFimPosition(CustomTestCase):
@@ -32,7 +32,7 @@ from sglang.srt.parser.conversation import (
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestConversationGetPrompt(CustomTestCase):
@@ -14,7 +14,7 @@ from sglang.srt.parser.harmony_parser import (
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestEvent(CustomTestCase):
@@ -9,7 +9,7 @@ from sglang.srt.parser.jinja_template_utils import (
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestTemplateContentFormatDetection(CustomTestCase):
@@ -4,7 +4,7 @@ from sglang.srt.parser.reasoning_parser import ReasoningParser
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
# Simulated model output that contains think tags (e.g. from DeepSeek-R1)
THINK_OUTPUT = (
@@ -18,7 +18,7 @@ from sglang.srt.parser.reasoning_parser import (
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
class TestStreamingParseResult(CustomTestCase):