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[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

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This commit is contained in:
Liangsheng Yin
2026-05-15 18:26:55 -07:00
committed by GitHub
parent d0c38329b2
commit b7d62bd724
473 changed files with 745 additions and 746 deletions
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test/registered/unit/mem_cache/test_decode_radix_lock_ref.py
+1 -1
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@@ -22,7 +22,7 @@ Usage:
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=10, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=10, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
import unittest
test/registered/unit/mem_cache/test_evict_policy.py
+1 -1
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@@ -2,7 +2,7 @@
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=6, suite="stage-a-test-cpu")
register_cpu_ci(est_time=6, suite="base-a-test-cpu")
import unittest
from unittest.mock import MagicMock
test/registered/unit/mem_cache/test_mamba_unittest.py
+1 -1
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@@ -23,7 +23,7 @@ from sglang.srt.server_args import ServerArgs, set_global_server_args_for_schedu
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=10, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=10, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=9, suite="stage-b-test-1-gpu-small-amd")
test/registered/unit/mem_cache/test_nsa_pool_host_unit.py
+1 -1
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@@ -12,7 +12,7 @@ from sglang.srt.mem_cache.memory_pool_host import (
from sglang.srt.utils import is_cuda, is_hip, is_npu, is_xpu
from sglang.test.ci.ci_register import register_cuda_ci
register_cuda_ci(est_time=9, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-small")
class TestNSAHiCacheTransfer(unittest.TestCase):
test/registered/unit/mem_cache/test_radix_cache_slru_accuracy.py
+1 -1
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@@ -13,7 +13,7 @@ from sglang.srt.mem_cache.memory_pool import MHATokenToKVPool, ReqToTokenPool
from sglang.srt.mem_cache.radix_cache import RadixCache, RadixKey
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=8, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=8, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=8, suite="stage-b-test-1-gpu-small-amd")
test/registered/unit/mem_cache/test_radix_cache_unit.py
+1 -1
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@@ -21,7 +21,7 @@ from sglang.srt.mem_cache.common import available_and_evictable_str
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
# CPU-based unit test, runs quickly on any GPU runner
register_cuda_ci(est_time=15, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=15, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=5, suite="stage-b-test-1-gpu-small-amd")
import random
test/registered/unit/mem_cache/test_radix_force_miss.py
+1 -1
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@@ -7,7 +7,7 @@ RadixCache.
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=5, suite="stage-a-test-cpu")
register_cpu_ci(est_time=5, suite="base-a-test-cpu")
import unittest
import unittest.mock
test/registered/unit/mem_cache/test_streaming_session_unit.py
+1 -1
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@@ -7,7 +7,7 @@ from sglang.srt.mem_cache.base_prefix_cache import MatchResult
from sglang.srt.session.streaming_session import SessionSlot, StreamingSession
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=12, suite="stage-a-test-cpu")
register_cpu_ci(est_time=12, suite="base-a-test-cpu")
class _FakeAllocator:
test/registered/unit/mem_cache/test_swa_alloc_extend_page_estimation.py
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@@ -15,7 +15,7 @@ from sglang.srt.mem_cache.swa_memory_pool import SWATokenToKVPoolAllocator
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=2, suite="stage-a-test-cpu")
register_cpu_ci(est_time=2, suite="base-a-test-cpu")
def _make_self(*, page_size: int, full_available: int, swa_available: int):
test/registered/unit/mem_cache/test_swa_eviction_boundary.py
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@@ -26,7 +26,7 @@ from sglang.srt.mem_cache.swa_radix_cache import SWARadixCache
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
register_cuda_ci(est_time=12, stage="stage-b", runner_config="1-gpu-large")
register_cuda_ci(est_time=12, stage="base-b", runner_config="1-gpu-large")
register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
# ---------------------------------------------------------------------------
test/registered/unit/mem_cache/test_swa_lock_release_lifecycle.py
+1 -1
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@@ -30,7 +30,7 @@ from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=12, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=12, stage="base-b", runner_config="1-gpu-small")
def _build_tree(
test/registered/unit/mem_cache/test_swa_unittest.py
+1 -1
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@@ -21,7 +21,7 @@ from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=9, stage="stage-b", runner_config="1-gpu-large")
register_cuda_ci(est_time=9, stage="base-b", runner_config="1-gpu-large")
register_amd_ci(est_time=10, suite="stage-b-test-1-gpu-small-amd")
test/registered/unit/mem_cache/test_unified_radix_cache_bench.py
+1 -1
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@@ -38,7 +38,7 @@ from sglang.srt.server_args import ServerArgs, set_global_server_args_for_schedu
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_cuda_ci
register_cuda_ci(est_time=25, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=25, stage="base-b", runner_config="1-gpu-small")
# ---------------------------------------------------------------------------
# Constants
test/registered/unit/mem_cache/test_unified_radix_cache_unittest.py
+1 -1
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@@ -49,7 +49,7 @@ from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=10, stage="stage-b", runner_config="1-gpu-small")
register_cuda_ci(est_time=10, stage="base-b", runner_config="1-gpu-small")
@dataclass(frozen=True)