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[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

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This commit is contained in:
Liangsheng Yin
2026-05-15 18:26:55 -07:00
committed by GitHub
parent d0c38329b2
commit b7d62bd724
473 changed files with 745 additions and 746 deletions
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test/registered/unit/function_call/test_function_call_parser.py
+1 -1
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@@ -31,7 +31,7 @@ from sglang.srt.function_call.pythonic_detector import PythonicDetector
from sglang.srt.function_call.qwen3_coder_detector import Qwen3CoderDetector
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=15, suite="stage-a-test-cpu")
register_cpu_ci(est_time=15, suite="base-a-test-cpu")
class TestPythonicDetector(unittest.TestCase):
test/registered/unit/function_call/test_hermes_detector.py
+1 -1
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@@ -7,7 +7,7 @@ from sglang.srt.function_call.hermes_detector import HermesDetector
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(1.0, "stage-a-test-cpu")
register_cpu_ci(1.0, "base-a-test-cpu")
class TestHermesDetector(CustomTestCase):
test/registered/unit/function_call/test_hunyuan_detector.py
+1 -1
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@@ -8,7 +8,7 @@ from sglang.srt.function_call.hunyuan_detector import HunyuanDetector
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(est_time=7, suite="stage-a-test-cpu")
register_cpu_ci(est_time=7, suite="base-a-test-cpu")
def _make_tools():
test/registered/unit/function_call/test_json_schema_constraint.py
+1 -1
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@@ -18,7 +18,7 @@ from sglang.srt.function_call.utils import (
)
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "stage-a-test-cpu")
register_cpu_ci(5, "base-a-test-cpu")
class TestJsonSchemaConstraint(unittest.TestCase):
test/registered/unit/function_call/test_llama32_detector.py
+1 -1
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@@ -7,7 +7,7 @@ from sglang.srt.function_call.llama32_detector import Llama32Detector
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(1.0, "stage-a-test-cpu")
register_cpu_ci(1.0, "base-a-test-cpu")
class TestLlama32Detector(CustomTestCase):
test/registered/unit/function_call/test_mistral_detector.py
+1 -1
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@@ -7,7 +7,7 @@ from sglang.srt.function_call.mistral_detector import MistralDetector
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(1.0, "stage-a-test-cpu")
register_cpu_ci(1.0, "base-a-test-cpu")
class TestMistralDetector(CustomTestCase):
test/registered/unit/function_call/test_parallel_tool_calls.py
+1 -1
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@@ -23,7 +23,7 @@ from sglang.srt.entrypoints.openai.protocol import Function, Tool
from sglang.srt.function_call.json_array_parser import JsonArrayParser
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "stage-a-test-cpu")
register_cpu_ci(5, "base-a-test-cpu")
class TestParallelToolCalls(unittest.TestCase):
test/registered/unit/function_call/test_poolside_v1_detector.py
+1 -1
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@@ -8,7 +8,7 @@ from sglang.srt.function_call.poolside_v1_detector import PoolsideV1Detector
from sglang.test.ci.ci_register import register_cpu_ci
from sglang.test.test_utils import CustomTestCase
register_cpu_ci(1.0, "stage-a-test-cpu")
register_cpu_ci(1.0, "base-a-test-cpu")
class TestPoolsideV1Detector(CustomTestCase):
test/registered/unit/function_call/test_unknown_tool_name.py
+1 -1
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@@ -9,7 +9,7 @@ from sglang.srt.function_call.base_format_detector import BaseFormatDetector
from sglang.srt.function_call.core_types import StreamingParseResult
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "stage-a-test-cpu")
register_cpu_ci(5, "base-a-test-cpu")
class DummyDetector(BaseFormatDetector):