diff --git a/test/registered/lora/test_lora_gpt_oss_20b_logprob_diff.py b/test/registered/lora/test_lora_gpt_oss_20b_logprob_diff.py index 9d8b001a9..aae7814d4 100644 --- a/test/registered/lora/test_lora_gpt_oss_20b_logprob_diff.py +++ b/test/registered/lora/test_lora_gpt_oss_20b_logprob_diff.py @@ -31,10 +31,12 @@ import torch from huggingface_hub import snapshot_download import sglang as sgl -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.srt.utils import is_hip +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci from sglang.test.test_utils import CustomTestCase register_cuda_ci(est_time=96, stage="extra-b", runner_config="4-gpu-b200") +register_amd_ci(est_time=180, suite="stage-c-test-4-gpu-amd") BASE_MODEL = "lmsys/gpt-oss-20b-bf16" LORA_HF_REPO = "yushengsu/lora-diff-gpt-oss-20b" @@ -43,8 +45,9 @@ MAX_LORA_RANK = 32 TP_SIZE = 4 MOE_RUNNER_BACKEND = "triton" EXPERTS_SHARED_OUTER_LORAS = True -PREFILL_ATTENTION_BACKEND = "fa4" -DECODE_ATTENTION_BACKEND = "fa4" +ATTENTION_BACKEND = "triton" if is_hip() else "flashinfer" +PREFILL_ATTENTION_BACKEND = "triton" if is_hip() else "fa4" +DECODE_ATTENTION_BACKEND = "triton" if is_hip() else "fa4" KL_THRESHOLD = 5e-3 @@ -80,7 +83,7 @@ class TestLoRAGptOss20BLogprobDiff(CustomTestCase): max_lora_rank=MAX_LORA_RANK, lora_paths={"my_lora": adapter_path}, lora_backend=LORA_BACKEND, - attention_backend="flashinfer", + attention_backend=ATTENTION_BACKEND, moe_runner_backend=MOE_RUNNER_BACKEND, experts_shared_outer_loras=EXPERTS_SHARED_OUTER_LORAS, prefill_attention_backend=PREFILL_ATTENTION_BACKEND, diff --git a/test/registered/lora/test_lora_qwen3_8b_logprob_diff.py b/test/registered/lora/test_lora_qwen3_8b_logprob_diff.py index 078c92823..c08ef5ffc 100644 --- a/test/registered/lora/test_lora_qwen3_8b_logprob_diff.py +++ b/test/registered/lora/test_lora_qwen3_8b_logprob_diff.py @@ -34,10 +34,11 @@ from huggingface_hub import snapshot_download import sglang as sgl from sglang.srt.lora.utils import auto_detect_lora_target_modules -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci from sglang.test.test_utils import CustomTestCase register_cuda_ci(est_time=56, stage="extra-a", runner_config="1-gpu-large") +register_amd_ci(est_time=120, suite="stage-b-test-1-gpu-small-amd") BASE_MODEL = "Qwen/Qwen3-8B" LORA_HF_REPO = "yushengsu/lora-diff-Qwen3-8B" @@ -54,14 +55,19 @@ def attention_backend_kwargs(): """Engine attention-backend kwargs for the current platform. fa4 and flashinfer are CUDA-only: fa4 dispatches into the CUTLASS CUTE DSL - kernel, which cannot import off CUDA. On XPU the equivalent fused path is - the intel_xpu backend, so select it there instead of forcing a backend the - device has no kernels for. + kernel, which cannot import off CUDA. Use Triton on ROCm and the equivalent + intel_xpu fused path on XPU. """ - from sglang.srt.utils import is_xpu + from sglang.srt.utils import is_hip, is_xpu if is_xpu(): return {"attention_backend": "intel_xpu"} + if is_hip(): + return { + "attention_backend": "triton", + "prefill_attention_backend": "triton", + "decode_attention_backend": "triton", + } return { "attention_backend": "flashinfer", "prefill_attention_backend": PREFILL_ATTENTION_BACKEND,