[diffusion] docs: verify the DGX Spark H3 recipe (#37456)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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@@ -24,10 +24,11 @@ const CONSUMER_24G = ["rtx4090", "rtx3090"];
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// their recipes are derived from the tier logic, not verified runs.
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const WORKSTATION_48G = ["rtx6000ada"];
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const WORKSTATION_96G = ["rtxpro6000"];
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// GB10 unified memory: 128 GB shared between CPU and GPU, so the VRAM/host
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// split that shapes every tier above does not exist. The whole 108 GB
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// deployment fits, and an offloaded component's "copy to device" is an
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// in-memory copy on the coherent bus. No hard-cap anchor was measured.
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// GB10 unified memory: 128 GB shared between CPU and GPU (121.7 GB visible
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// to torch), so the VRAM/host split that shapes every tier above does not
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// exist. The 134 GiB deployment still exceeds the pool, and the loader's
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// automatic placement handles that split better than any explicit flag set:
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// verified on DGX Spark, see unified128Flags().
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const UNIFIED_128G = ["dgx-spark"];
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const CONSUMER_SINGLE = [
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...CONSUMER_12G,
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@@ -73,14 +74,12 @@ function consumerFlags(s) {
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}
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function unified128Flags() {
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// Unified memory holds the whole deployment: the memory manager pins every
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// component (the budget sees ~128 GB), and streamed copies move at memory
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// speed on the coherent bus. video_vae=36 still buys the fast decode.
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return [
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"--performance-mode memory",
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"--layerwise-offload-components dit,text_encoder,vae",
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"--layerwise-resident-layers video_vae=36",
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];
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// No flags: the deployment (134 GiB) exceeds the pool, automatic offload
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// engages on its own and pins 42 of 50 DiT layers. Measured on DGX Spark,
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// the explicit discrete-GPU recipe (--performance-mode memory + offload
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// components + video_vae=36) ran the same denoise 2.1x slower (25.8 vs
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// 12.1 s/it) -- do not carry discrete-card flags onto unified memory.
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return [];
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}
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function workstation96Flags() {
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@@ -117,8 +116,10 @@ function consumerHints(s) {
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}
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if (UNIFIED_128G.includes(s.hw)) {
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return [
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"derived recipe, not yet verified: the 128 GB unified pool holds the whole 108 GB deployment, so the memory manager pins every component and offload copies run at memory speed on the coherent bus",
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"expect step times above the discrete-GPU rows: the GB10's ~273 GB/s memory bandwidth is the denoise ceiling, not the placement",
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"verified on DGX Spark at 480P: ~12.1 s per denoise step steady-state, ~40 s decode, ~12 min per warm request -- with no flags at all; adding the discrete-GPU offload flags measured 2.1x slower on the same box",
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"the text encoder runs ~5.5 min per request and does not warm up: it is steady-state compute on this chip, not a stall -- budget for it",
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"expect ~12 min of server load before the first request; the first request itself runs at full speed (no JIT tax was measured)",
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"step times sit above the discrete-GPU rows because the GB10's ~273 GB/s memory bandwidth is the denoise ceiling, not the placement",
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];
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}
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if (WORKSTATION_96G.includes(s.hw)) {
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