[AMD] fix(triton-mla): cap max_kv_splits at 256 on gfx942 (Kimi-K2.6 hang) (#24762)
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@@ -22,10 +22,12 @@ from sglang.srt.utils import (
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get_device_core_count,
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get_int_env_var,
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is_cuda,
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is_gfx942_supported,
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next_power_of_2,
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)
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_is_cuda = is_cuda()
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_is_gfx942 = is_gfx942_supported()
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if _is_cuda:
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from sgl_kernel.utils import is_arch_support_pdl
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@@ -163,6 +165,15 @@ class TritonAttnBackend(AttentionBackend):
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self.device_core_count,
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self.max_context_len,
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)
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if _is_gfx942:
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# gfx942 (MI300X / MI325X) has 304 CUs, so #20479's next_power_of_2(sm_count)
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# rounds up to 512 — twice MI355X's natural cap of 256 — and the persistent
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# cuda_graph_attn_logits fp32 buffer hits ~4 GiB on Kimi-K2.6 (v_head_dim=512),
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# faulting in ROCm CUDA graph replay
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# (https://github.com/sgl-project/sglang/actions/runs/25513282022/job/74877480809).
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# Pin the cap at 256 so gfx942 matches the gfx950 (MI355X) behavior that we
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# already validated end-to-end.
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self.max_kv_splits = min(self.max_kv_splits, 256)
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if _is_cuda:
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self.use_pdl = is_arch_support_pdl()
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else:
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@@ -3656,6 +3656,18 @@ def is_gfx95_supported():
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return False
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@lru_cache(maxsize=1)
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def is_gfx942_supported():
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"""
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Returns whether the current platform is AMD CDNA3 (gfx942 — MI300X / MI325X).
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"""
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if torch.version.hip:
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gcn_arch = torch.cuda.get_device_properties(0).gcnArchName
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return any(gfx in gcn_arch for gfx in ["gfx942"])
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else:
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return False
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def get_hip_version():
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if torch.version.hip:
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return tuple(map(int, torch.version.hip.split("-")[0].split(".")))
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