[XPU] Enable qwen3.5 on XPU (#21668)

Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
This commit is contained in:
Xia Weiwen
2026-05-18 14:59:19 +08:00
committed by GitHub
co-authored by Ma Mingfei
parent 1f9eda4ea1
commit 8d5ed330cc
14 changed files with 757 additions and 13 deletions
+12
View File
@@ -30,6 +30,7 @@ class HWBackend(Enum):
CUDA = auto()
AMD = auto()
NPU = auto()
XPU = auto()
@dataclass
@@ -104,11 +105,22 @@ def register_npu_ci(
return None
def register_xpu_ci(
est_time: float,
suite: str,
nightly: bool = False,
disabled: Optional[str] = None,
):
"""Marker for XPU CI registration (parsed via AST; runtime no-op)."""
return None
REGISTER_MAPPING = {
"register_cpu_ci": HWBackend.CPU,
"register_cuda_ci": HWBackend.CUDA,
"register_amd_ci": HWBackend.AMD,
"register_npu_ci": HWBackend.NPU,
"register_xpu_ci": HWBackend.XPU,
}