[CPU][CI]: rename Xeon CPU CI suites to stage-*-intel (#37395)

Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
This commit is contained in:
jundu
2026-09-04 10:08:41 +08:00
committed by GitHub
co-authored by Ma Mingfei
parent c1b4d535d7
commit 8770c1db1f
109 changed files with 115 additions and 115 deletions
@@ -37,7 +37,7 @@ from sglang.srt.function_call.utils import get_schema_properties
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(est_time=20, suite="base-a-test-cpu")
register_cpu_ci(est_time=70, suite="base-c-test-cpu")
register_cpu_ci(est_time=70, suite="stage-b-test-cpu-intel")
@functools.lru_cache(maxsize=None)
@@ -19,7 +19,7 @@ from sglang.srt.function_call.utils import (
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=6, suite="base-c-test-cpu")
register_cpu_ci(est_time=6, suite="stage-b-test-cpu-intel")
class TestJsonSchemaConstraint(unittest.TestCase):
@@ -24,7 +24,7 @@ from sglang.srt.function_call.json_array_parser import JsonArrayParser
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=4, suite="base-c-test-cpu")
register_cpu_ci(est_time=4, suite="stage-b-test-cpu-intel")
class TestParallelToolCalls(unittest.TestCase):
@@ -10,7 +10,7 @@ from sglang.srt.function_call.core_types import StreamingParseResult
from sglang.test.ci.ci_register import register_cpu_ci
register_cpu_ci(5, "base-a-test-cpu")
register_cpu_ci(est_time=5, suite="base-c-test-cpu")
register_cpu_ci(est_time=5, suite="stage-b-test-cpu-intel")
class DummyDetector(BaseFormatDetector):