[CPU][CI]: rename Xeon CPU CI suites to stage-*-intel (#37395)

Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
This commit is contained in:
jundu
2026-09-04 10:08:41 +08:00
committed by GitHub
co-authored by Ma Mingfei
parent c1b4d535d7
commit 8770c1db1f
109 changed files with 115 additions and 115 deletions
@@ -20,7 +20,7 @@ from sglang.test.test_utils import (
# RadixAttention server integration tests
register_cuda_ci(est_time=100, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=100, suite="stage-b-test-1-gpu-small-amd")
register_cpu_ci(est_time=405, suite="base-c-test-cpu")
register_cpu_ci(est_time=405, suite="stage-b-test-cpu-intel")
class TestRadixCacheFCFS(CustomTestCase):
@@ -17,7 +17,7 @@ from sglang.test.test_utils import (
register_cuda_ci(est_time=55, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=55, suite="stage-b-test-1-gpu-small-amd")
register_cpu_ci(est_time=113, suite="base-c-test-cpu")
register_cpu_ci(est_time=113, suite="stage-b-test-cpu-intel")
MODEL = DEFAULT_SMALL_MODEL_NAME_FOR_TEST
@@ -7,7 +7,7 @@ from sglang.test.server_fixtures.default_fixture import DefaultServerBase
MODEL = "openai/gpt-oss-20b"
register_cuda_ci(est_time=151, stage="base-b", runner_config="1-gpu-large")
register_cpu_ci(est_time=1602, suite="base-c-test-cpu")
register_cpu_ci(est_time=1602, suite="stage-b-test-cpu-intel")
class TestSWARadixCacheKL(KLDivergenceMixin, DefaultServerBase):