feat: Support HiCache for MiMo-V2 models (1/N) (#27378)
Co-authored-by: Zhangheng <hzh0425@apache.org> Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
This commit is contained in:
co-authored by
Zhangheng
晟海
parent
60d4bd4c70
commit
806365e778
@@ -0,0 +1,153 @@
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import sys
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from types import SimpleNamespace
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import pytest
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import torch
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from sglang.srt.mem_cache.memory_pool_host import AsymmetricMHATokenToKVPoolHost
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from sglang.test.ci.ci_register import register_cuda_ci
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register_cuda_ci(est_time=10, suite="base-b-kernel-unit-1-gpu-large")
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# These tests use AsymmetricMHATokenToKVPoolHost methods and let that class call
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# the real sgl-kernel transfer ops. The asymmetric host pool is kernel-only;
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# direct/page_first_direct is intentionally rejected in the CPU dispatch tests.
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pytestmark = pytest.mark.skipif(
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not torch.cuda.is_available(), reason="asymmetric host-pool tests require CUDA."
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)
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DEVICE = "cuda"
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PAGE_SIZE = 16
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NUM_LAYERS = 3
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TOTAL_ITEMS = PAGE_SIZE * 8
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HEAD_NUM = 4
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K_HEAD_DIM = 192
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V_HEAD_DIM = 128
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DTYPES = [torch.float16, torch.bfloat16]
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def token_indices_for_pages(pages, page_size=PAGE_SIZE, device=None):
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indices = torch.cat(
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[
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torch.arange(
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int(page) * page_size,
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(int(page) + 1) * page_size,
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dtype=torch.int64,
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)
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for page in pages.tolist()
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]
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)
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return indices if device is None else indices.to(device)
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def fill_with_offset(tensor, offset):
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data = torch.arange(tensor.numel(), device=tensor.device, dtype=tensor.dtype)
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tensor.copy_((data + offset).view_as(tensor))
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def make_host_pool(dtype):
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host = AsymmetricMHATokenToKVPoolHost.__new__(AsymmetricMHATokenToKVPoolHost)
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host.layout = "page_first"
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host.page_size = PAGE_SIZE
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host.layer_num = NUM_LAYERS
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host.head_num = HEAD_NUM
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host.head_dim = K_HEAD_DIM
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host.v_head_dim = V_HEAD_DIM
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host.dtype = dtype
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host.kv_buffer = (
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torch.zeros(
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TOTAL_ITEMS, NUM_LAYERS, HEAD_NUM, K_HEAD_DIM, dtype=dtype
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).pin_memory(),
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torch.zeros(
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TOTAL_ITEMS, NUM_LAYERS, HEAD_NUM, V_HEAD_DIM, dtype=dtype
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).pin_memory(),
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)
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return host
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def make_device_pool(dtype):
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k_buffer = [
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torch.empty(TOTAL_ITEMS, HEAD_NUM, K_HEAD_DIM, dtype=dtype, device=DEVICE)
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for _ in range(NUM_LAYERS)
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]
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v_buffer = [
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torch.empty(TOTAL_ITEMS, HEAD_NUM, V_HEAD_DIM, dtype=dtype, device=DEVICE)
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for _ in range(NUM_LAYERS)
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]
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for layer_id in range(NUM_LAYERS):
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fill_with_offset(k_buffer[layer_id], layer_id * 1000)
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fill_with_offset(v_buffer[layer_id], layer_id * 1000 + 100)
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return SimpleNamespace(
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k_buffer=k_buffer,
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v_buffer=v_buffer,
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k_data_ptrs=torch.tensor(
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[x.data_ptr() for x in k_buffer], dtype=torch.uint64, device=DEVICE
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),
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v_data_ptrs=torch.tensor(
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[x.data_ptr() for x in v_buffer], dtype=torch.uint64, device=DEVICE
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),
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)
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def assert_backup_matches_device(host, device_pool, host_indices_host, device_indices):
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for layer_id in range(NUM_LAYERS):
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torch.testing.assert_close(
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host.k_buffer[host_indices_host, layer_id],
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device_pool.k_buffer[layer_id][device_indices].cpu(),
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)
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torch.testing.assert_close(
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host.v_buffer[host_indices_host, layer_id],
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device_pool.v_buffer[layer_id][device_indices].cpu(),
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)
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def assert_load_matches_host(host, device_pool, host_indices_host, load_indices):
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for layer_id in range(NUM_LAYERS):
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torch.testing.assert_close(
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device_pool.k_buffer[layer_id][load_indices],
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host.k_buffer[host_indices_host, layer_id].to(DEVICE),
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)
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torch.testing.assert_close(
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device_pool.v_buffer[layer_id][load_indices],
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host.v_buffer[host_indices_host, layer_id].to(DEVICE),
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)
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@pytest.mark.parametrize("dtype", DTYPES)
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def test_asymmetric_mha_kernel_page_first_roundtrip(dtype):
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# Covers D2H backup + H2D load through AsymmetricMHATokenToKVPoolHost using
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# MiMoV2's real K/V head dims and the real MLA single-buffer kernels.
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host = make_host_pool(dtype)
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device_pool = make_device_pool(dtype)
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device_pages = torch.tensor([1, 2, 3], dtype=torch.int64)
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host_pages = torch.tensor([0, 1, 2], dtype=torch.int64)
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load_pages = torch.tensor([4, 5, 6], dtype=torch.int64)
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device_indices_host = token_indices_for_pages(device_pages)
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host_indices_host = token_indices_for_pages(host_pages)
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load_indices_host = token_indices_for_pages(load_pages)
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device_indices = device_indices_host.to(DEVICE)
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host_indices = host_indices_host.to(DEVICE)
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load_indices = load_indices_host.to(DEVICE)
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host.backup_from_device_all_layer(
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device_pool, host_indices, device_indices, io_backend="kernel"
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)
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torch.cuda.synchronize()
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assert_backup_matches_device(
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host, device_pool, host_indices_host, device_indices_host
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)
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for layer_id in range(NUM_LAYERS):
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device_pool.k_buffer[layer_id].zero_()
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device_pool.v_buffer[layer_id].zero_()
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host.load_to_device_per_layer(
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device_pool, host_indices, load_indices, layer_id, io_backend="kernel"
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)
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torch.cuda.synchronize()
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assert_load_matches_host(host, device_pool, host_indices_host, load_indices_host)
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if __name__ == "__main__":
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sys.exit(pytest.main([__file__, "-v", "-s"]))
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@@ -1,5 +1,6 @@
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import unittest
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from sglang.srt.environ import envs
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from sglang.test.ci.ci_register import register_cuda_ci
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from sglang.test.kits.eval_accuracy_kit import GSM8KMixin
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from sglang.test.server_fixtures.mmmu_fixture import MMMUServerBase
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@@ -20,6 +21,13 @@ MIMO_V2_OTHER_ARGS = [
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"fa3",
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"--reasoning-parser",
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"mimo",
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"--enable-hierarchical-cache",
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"--hicache-ratio",
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"1.5",
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"--hicache-mem-layout",
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"page_first",
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"--hicache-io-backend",
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"kernel",
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]
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MIMO_V2_MTP_OTHER_ARGS = MIMO_V2_OTHER_ARGS + [
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"--speculative-algorithm",
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@@ -42,6 +50,11 @@ class TestMiMoV2(GSM8KMixin, MMMUServerBase):
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server_api_key = None
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other_args = MIMO_V2_MTP_OTHER_ARGS
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@classmethod
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def setUpClass(cls):
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with envs.SGLANG_ENABLE_UNIFIED_RADIX_TREE.override(True):
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super().setUpClass()
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if __name__ == "__main__":
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unittest.main()
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@@ -1,5 +1,6 @@
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import unittest
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from sglang.srt.environ import envs
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from sglang.test.ci.ci_register import register_cuda_ci
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from sglang.test.kits.eval_accuracy_kit import GSM8KMixin
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from sglang.test.kits.spec_decoding_kit import SpecDecodingMixin
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@@ -42,11 +43,23 @@ class TestMiMoV2Flash(GSM8KMixin, SpecDecodingMixin, DefaultServerBase):
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"--enable-multi-layer-eagle",
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"--model-loader-extra-config",
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'{"enable_multithread_load": true,"num_threads": 64}',
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"--enable-hierarchical-cache",
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"--hicache-ratio",
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"1.5",
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"--hicache-mem-layout",
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"page_first",
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"--hicache-io-backend",
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"kernel",
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]
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bs_1_speed_thres = 170
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accept_length_thres = 3.2
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@classmethod
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def setUpClass(cls):
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with envs.SGLANG_ENABLE_UNIFIED_RADIX_TREE.override(True):
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super().setUpClass()
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if __name__ == "__main__":
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unittest.main()
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@@ -0,0 +1,156 @@
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"""Unit tests for asymmetric MHA host KV pool transfer dispatch."""
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import unittest
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from types import SimpleNamespace
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from unittest import mock
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import torch
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from sglang.srt.mem_cache.memory_pool_host import (
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AsymmetricMHATokenToKVPoolHost,
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MHATokenToKVPoolHost,
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get_mha_host_pool_cls,
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)
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from sglang.test.ci.ci_register import register_cpu_ci
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from sglang.test.test_utils import CustomTestCase
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register_cpu_ci(est_time=5, suite="base-a-test-cpu")
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def _make_host(layout: str) -> AsymmetricMHATokenToKVPoolHost:
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host = AsymmetricMHATokenToKVPoolHost.__new__(AsymmetricMHATokenToKVPoolHost)
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host.layout = layout
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host.page_size = 2
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host.layer_num = 3
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host.head_num = 2
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host.head_dim = 4
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host.v_head_dim = 6
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host.dtype = torch.float16
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if layout == "page_first":
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k_dims = (8, host.layer_num, host.head_num, host.head_dim)
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v_dims = (8, host.layer_num, host.head_num, host.v_head_dim)
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else:
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raise ValueError(f"Unsupported test layout: {layout}")
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host.kv_buffer = (torch.empty(k_dims), torch.empty(v_dims))
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return host
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def _make_device_pool(host: AsymmetricMHATokenToKVPoolHost) -> SimpleNamespace:
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size = 8
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k_buffer = [
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torch.empty(size, host.head_num, host.head_dim) for _ in range(host.layer_num)
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]
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v_buffer = [
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torch.empty(size, host.head_num, host.v_head_dim) for _ in range(host.layer_num)
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]
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return SimpleNamespace(
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k_buffer=k_buffer,
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v_buffer=v_buffer,
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k_data_ptrs=torch.tensor([x.data_ptr() for x in k_buffer], dtype=torch.uint64),
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v_data_ptrs=torch.tensor([x.data_ptr() for x in v_buffer], dtype=torch.uint64),
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)
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class TestAsymmetricMHATokenToKVPoolHost(CustomTestCase):
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def test_factory_selects_asymmetric_pool_for_mismatched_kv_dims(self):
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symmetric_pool = SimpleNamespace(head_dim=4, v_head_dim=4)
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asymmetric_pool = SimpleNamespace(head_dim=4, v_head_dim=6)
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self.assertIs(get_mha_host_pool_cls(symmetric_pool), MHATokenToKVPoolHost)
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self.assertIs(
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get_mha_host_pool_cls(asymmetric_pool), AsymmetricMHATokenToKVPoolHost
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)
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def test_kernel_load_splits_k_and_v_with_separate_strides(self):
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# Dispatch-only test: the CUDA kernel is mocked; this verifies that K and
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# V are sent as separate single-buffer calls with their own byte strides.
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host = _make_host("page_first")
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device_pool = _make_device_pool(host)
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host_indices = torch.tensor([0, 1, 2, 3], dtype=torch.int64)
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device_indices = torch.tensor([4, 5, 6, 7], dtype=torch.int64)
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with mock.patch(
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"sglang.srt.mem_cache.memory_pool_host.transfer_kv_per_layer_mla_pf_lf",
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create=True,
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) as transfer:
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host.load_to_device_per_layer(
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device_pool,
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host_indices,
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device_indices,
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layer_id=1,
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io_backend="kernel",
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)
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self.assertEqual(transfer.call_count, 2)
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k_call, v_call = transfer.call_args_list
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self.assertIs(k_call.kwargs["src"], host.k_buffer)
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self.assertIs(k_call.kwargs["dst"], device_pool.k_buffer[1])
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self.assertEqual(k_call.kwargs["item_size"], 16)
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self.assertEqual(k_call.kwargs["src_layout_dim"], 48)
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self.assertIs(v_call.kwargs["src"], host.v_buffer)
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self.assertIs(v_call.kwargs["dst"], device_pool.v_buffer[1])
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self.assertEqual(v_call.kwargs["item_size"], 24)
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self.assertEqual(v_call.kwargs["src_layout_dim"], 72)
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def test_kernel_backup_splits_k_and_v_with_separate_strides(self):
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# Dispatch-only test: D2H backup must pass separate K/V layer pointer
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# tables so the single-buffer MLA kernel gets the correct stride per side.
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host = _make_host("page_first")
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device_pool = _make_device_pool(host)
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host_indices = torch.tensor([0, 1, 2, 3], dtype=torch.int64)
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device_indices = torch.tensor([4, 5, 6, 7], dtype=torch.int64)
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with mock.patch(
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"sglang.srt.mem_cache.memory_pool_host.transfer_kv_all_layer_mla_lf_pf",
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create=True,
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) as transfer:
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host.backup_from_device_all_layer(
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device_pool, host_indices, device_indices, io_backend="kernel"
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)
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self.assertEqual(transfer.call_count, 2)
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k_call, v_call = transfer.call_args_list
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self.assertIs(k_call.kwargs["src_layers"], device_pool.k_data_ptrs)
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self.assertIs(k_call.kwargs["dst"], host.k_buffer)
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self.assertEqual(k_call.kwargs["item_size"], 16)
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self.assertEqual(k_call.kwargs["dst_layout_dim"], 48)
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self.assertIs(v_call.kwargs["src_layers"], device_pool.v_data_ptrs)
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self.assertIs(v_call.kwargs["dst"], host.v_buffer)
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self.assertEqual(v_call.kwargs["item_size"], 24)
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self.assertEqual(v_call.kwargs["dst_layout_dim"], 72)
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def test_direct_load_is_rejected(self):
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# Direct single-buffer D2H is not reliable for asymmetric K/V in the
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# current sgl-kernel fast path, so the asymmetric host pool is kernel-only.
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host = _make_host("page_first")
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device_pool = _make_device_pool(host)
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host_indices = torch.tensor([0, 1, 2, 3], dtype=torch.int64)
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device_indices = torch.tensor([4, 5, 6, 7], dtype=torch.int64)
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with self.assertRaisesRegex(ValueError, "expected 'kernel'"):
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host.load_to_device_per_layer(
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device_pool,
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host_indices,
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device_indices,
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layer_id=2,
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io_backend="direct",
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)
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def test_direct_backup_is_rejected(self):
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# Same restriction for D2H backup: asymmetric MHA uses the kernel path
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# until the direct kernel has an explicit safe asymmetric mode.
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host = _make_host("page_first")
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device_pool = _make_device_pool(host)
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host_indices = torch.tensor([0, 1, 2, 3], dtype=torch.int64)
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device_indices = torch.tensor([4, 5, 6, 7], dtype=torch.int64)
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with self.assertRaisesRegex(ValueError, "expected 'kernel'"):
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host.backup_from_device_all_layer(
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device_pool, host_indices, device_indices, io_backend="direct"
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)
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if __name__ == "__main__":
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unittest.main()
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@@ -450,16 +450,24 @@ class TestUnifiedRadixCacheKVEvents(CustomTestCase):
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def _init_hicache(self, tree, *, write_policy: str = "write_through"):
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import sglang.srt.mem_cache.hybrid_cache.hybrid_pool_assembler as assembler
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orig_kv_host_pool = assembler.MHATokenToKVPoolHost
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# Wrap the host-pool factory (not MHATokenToKVPoolHost directly)
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# because the assembler picks between MHATokenToKVPoolHost and
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# AsymmetricMHATokenToKVPoolHost via get_mha_host_pool_cls(device_pool).
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orig_get_mha_host_pool_cls = assembler.get_mha_host_pool_cls
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def kv_host_pool_wrapper(*args, **kwargs):
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kwargs["pin_memory"] = False
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return orig_kv_host_pool(*args, **kwargs)
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def get_mha_host_pool_cls_wrapper(device_pool):
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host_pool_cls = orig_get_mha_host_pool_cls(device_pool)
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def kv_host_pool_wrapper(*args, **kwargs):
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kwargs["pin_memory"] = False
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return host_pool_cls(*args, **kwargs)
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return kv_host_pool_wrapper
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patcher = mock.patch.object(
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assembler,
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"MHATokenToKVPoolHost",
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side_effect=kv_host_pool_wrapper,
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"get_mha_host_pool_cls",
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side_effect=get_mha_host_pool_cls_wrapper,
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)
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patcher.start()
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self.addCleanup(patcher.stop)
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@@ -2370,12 +2378,20 @@ class UnifiedRadixCacheSuite:
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):
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import sglang.srt.mem_cache.hybrid_cache.hybrid_pool_assembler as assembler
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orig_kv_host_pool = assembler.MHATokenToKVPoolHost
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# See _init_hicache: wrap the factory rather than MHATokenToKVPoolHost
|
||||
# directly so the pin_memory=False override applies to both
|
||||
# MHATokenToKVPoolHost and AsymmetricMHATokenToKVPoolHost.
|
||||
orig_get_mha_host_pool_cls = assembler.get_mha_host_pool_cls
|
||||
orig_mamba_host_pool = assembler.MambaPoolHost
|
||||
|
||||
def kv_host_pool_wrapper(*args, **kwargs):
|
||||
kwargs["pin_memory"] = False
|
||||
return orig_kv_host_pool(*args, **kwargs)
|
||||
def get_mha_host_pool_cls_wrapper(device_pool):
|
||||
host_pool_cls = orig_get_mha_host_pool_cls(device_pool)
|
||||
|
||||
def kv_host_pool_wrapper(*args, **kwargs):
|
||||
kwargs["pin_memory"] = False
|
||||
return host_pool_cls(*args, **kwargs)
|
||||
|
||||
return kv_host_pool_wrapper
|
||||
|
||||
def mamba_host_pool_wrapper(*args, **kwargs):
|
||||
kwargs["pin_memory"] = False
|
||||
@@ -2384,8 +2400,8 @@ class UnifiedRadixCacheSuite:
|
||||
patchers = [
|
||||
mock.patch.object(
|
||||
assembler,
|
||||
"MHATokenToKVPoolHost",
|
||||
side_effect=kv_host_pool_wrapper,
|
||||
"get_mha_host_pool_cls",
|
||||
side_effect=get_mha_host_pool_cls_wrapper,
|
||||
),
|
||||
mock.patch.object(
|
||||
assembler,
|
||||
|
||||
Reference in New Issue
Block a user