[ROCm] Fix QuickReduce fp16 saturation corrupting bf16 all-reduces (106M non-finite -> 0, +0.3%) (#34484)
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@@ -22,6 +22,9 @@ struct CodecFP : public CodecBase {
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static constexpr int kWorldSize = world_size;
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static constexpr int kRankAtoms = kAtoms / kWorldSize;
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// No block scale to protect, so the bf16 -> fp16 cast scale is the only range guard.
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static constexpr int kCastScaleLog2 = kQRFp16CastScaleLog2Fp;
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// Codec tile size process by this workgroup.
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// Each thread processes atoms of f16x8_t (16B).
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static constexpr int kRankTransmittedTileSize = kBlockSize * kRankAtoms * sizeof(int32x4_t);
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@@ -54,6 +57,9 @@ template <typename T, int world_size>
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struct CodecQ4 : public CodecBase {
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static constexpr int kWorldSize = world_size;
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// Block-scaled: the cast scale would only cost the low end. See quick_all_reduce_base.h.
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static constexpr int kCastScaleLog2 = kQRFp16CastScaleLog2Quant;
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// Codec tile size process by this workgroup.
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// Each threads processes a fragment of fp16x8_t (16B),
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// into a int4x8_t (4B) and a fp16 scale shared among 32 values.
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@@ -192,6 +198,9 @@ template <typename T, int world_size>
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struct CodecQ6 : public CodecBase {
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static constexpr int kWorldSize = world_size;
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// Block-scaled: the cast scale would only cost the low end. See quick_all_reduce_base.h.
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static constexpr int kCastScaleLog2 = kQRFp16CastScaleLog2Quant;
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// Codec tile size process by this workgroup.
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// Each threads processes a fragment of fp16x8_t (16B),
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// into a int6x8_t (4B + 2B) and a fp16 scale shared among 32 values.
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@@ -350,6 +359,9 @@ template <typename T, int world_size>
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struct CodecQ8 : public CodecBase {
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static constexpr int kWorldSize = world_size;
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// Block-scaled: the cast scale would only cost the low end. See quick_all_reduce_base.h.
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static constexpr int kCastScaleLog2 = kQRFp16CastScaleLog2Quant;
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// Codec tile size process by this workgroup.
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// Each threads processes a fragment of f16x8_t (16B),
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// into a int8x8_t (8B) and a f16 scale shared among 32 values.
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@@ -486,6 +498,21 @@ struct CodecQ8 : public CodecBase {
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}
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};
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// Keep the scale on the f32 side of the narrowing conversion. With the HIP
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// intrinsic, LLVM can reassociate (bf16_as_f32 * scale) -> fp16 into
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// fp16(bf16_as_f32) * scale, which clips values above 65504 before the range
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// guard is applied. The opaque ISA conversion makes the scaled f32 values
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// explicit inputs and prevents that transform.
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__quickreduce_device_inline__ half2 scaled_bfloat162_to_half2(nv_bfloat162 value, float scale) {
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float2 scaled = __bfloat1622float2(value);
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scaled.x *= scale;
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scaled.y *= scale;
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int packed;
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asm volatile("v_cvt_pk_f16_f32 %0, %1, %2" : "=v"(packed) : "v"(scaled.x), "v"(scaled.y));
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return *reinterpret_cast<half2*>(&packed);
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}
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// Twoshot All Reduce
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template <typename T, class Codec, bool cast_bf2half>
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struct AllReduceTwoshot {
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@@ -493,6 +520,10 @@ struct AllReduceTwoshot {
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static constexpr int kWorldSize = Codec::kWorldSize;
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// Power of two, so both multiplies are exact.
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static constexpr float kCastScale = static_cast<float>(1 << Codec::kCastScaleLog2);
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static constexpr float kCastInvScale = 1.0f / kCastScale;
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__device__ static void
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run(T const* __restrict__ input,
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T* __restrict__ output,
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@@ -524,8 +555,15 @@ struct AllReduceTwoshot {
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half2 half_buf[4];
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#pragma unroll
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for (int j = 0; j < 4; ++j) {
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float2 f = __bfloat1622float2(bf_buf[j]);
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half_buf[j] = __float22half2_rn(f);
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if constexpr (Codec::kCastScaleLog2 == 0) {
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float2 f = __bfloat1622float2(bf_buf[j]);
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// S=1 for quantized codecs; preserve their existing conversion path.
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f.x *= kCastInvScale;
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f.y *= kCastInvScale;
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half_buf[j] = __float22half2_rn(f);
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} else {
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half_buf[j] = scaled_bfloat162_to_half2(bf_buf[j], kCastInvScale);
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}
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}
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tA[i] = *reinterpret_cast<const int32x4_t*>(half_buf);
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}
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@@ -620,6 +658,9 @@ struct AllReduceTwoshot {
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#pragma unroll
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for (int j = 0; j < 4; ++j) {
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float2 f = __half22float2(half_buf[j]);
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// Undo the load-side scale; the fp32 intermediate cannot overflow.
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f.x *= kCastScale;
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f.y *= kCastScale;
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bf16_buf[j] = __float22bfloat162_rn(f);
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}
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buffer_store_dwordx4(*reinterpret_cast<const int32x4_t*>(bf16_buf), dst_buffer.descriptor, dst_offset, 0, 0);
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@@ -32,6 +32,19 @@ using int32x4_t = __attribute__((__vector_size__(4 * sizeof(int)))) int;
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static constexpr int kNegOne = 0xBC00BC00; // {-1, -1}, fp16x2_t
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// Range guard for the bf16 -> fp16 fast path (AllReduceTwoshot<..., true>): fp16 saturates at
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// 65504. Divide by a power of two on load and multiply it back on store; the shift is exact, so
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// sum(x_i / S) * S == sum(x_i). Per codec, because only CodecFP needs it: it carries no block
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// scale, so S is its only range guard, and is free there. The quantized codecs already normalize
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// each 32 values by their own block scale, and MODE.FP16_OVFL (armed in CodecBase) keeps an
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// over-ceiling element from becoming an inf that poisons its block through the block max. S buys
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// them nothing and costs the low end: encoding_scale = rcp(decoding_scale) saturates at 65504,
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// past which encode and decode stop being reciprocals and the block is attenuated wholesale.
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// That cliff sits at blockmax = S * L / 65504 (L = 8 / 32 / 128 for Q4 / Q6 / Q8), so raising S
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// walks it into real data -- 1 -> 2 measures 62% perplexity on GLM-5.2. Leave it at 1.
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static constexpr int kQRFp16CastScaleLog2Fp = 4; // S = 16, CodecFP
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static constexpr int kQRFp16CastScaleLog2Quant = 0; // S = 1, CodecQ4 / CodecQ6 / CodecQ8
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// Number of atoms (4xf16x2_t) processed by a single thread
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static constexpr int kAtoms = 8;
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@@ -95,12 +108,15 @@ __quickreduce_device_inline__ static void
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buffer_store_dwordx4(int32x4_t data, int32x4_t srsrc, int32_t voffset, int32_t soffset, int32_t aux) {}
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#endif
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// MODE.FP16_OVFL clamps overflowing fp16 results to +/-MAX_FP16 instead of inf, the f32 -> f16
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// conversion (v_cvt_pk_f16_f32) included. The memory clobber is load-bearing: without it the
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// compiler may hoist a conversion above the s_setreg, and that conversion still produces inf.
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__quickreduce_device_inline__ static void set_fp16_ovfl(bool const value) {
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#if defined(__gfx942__)
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#if defined(__gfx942__) || defined(__gfx950__)
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if (value) {
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asm volatile("s_setreg_imm32_b32 0xdc1, 1;" ::);
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asm volatile("s_setreg_imm32_b32 0xdc1, 1;" ::: "memory");
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} else {
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asm volatile("s_setreg_imm32_b32 0xdc1, 0;" ::);
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asm volatile("s_setreg_imm32_b32 0xdc1, 0;" ::: "memory");
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}
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#endif
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}
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