[diffusion] feat: support mixed w4a4 and int8 checkpoints (#36040)

This commit is contained in:
Mick
2026-08-24 20:35:11 +08:00
committed by GitHub
parent e586a6f2c5
commit 76d1401881
5 changed files with 80 additions and 5 deletions
@@ -311,6 +311,8 @@ current `comfy-kitchen`, then pass a full or pruned FL2VA / Ref2VA file such as
`Merserk/MiniMax-H3-INT4-ConvRot/minimax_h3_fl2va_pruned_int4_convrot.safetensors`
to `--transformer-weights-path`. The packed weights stay INT4 and the runtime
honors each layer's activation mode; omit `--quantization`.
Mixed exports use the same command: SGLang dispatches each marked layer to its
serialized W4A4 or INT8 ConvRot kernel instead of applying one global method.
### Advanced: precomputed AdaLN cache
+2 -2
View File
@@ -202,11 +202,11 @@ backend.
</tr>
<tr>
<td><code>comfy-w4a4-convrot</code></td>
<td>Safetensors with serialized <code>convrot_w4a4</code> layer metadata</td>
<td>Safetensors with serialized <code>convrot_w4a4</code> metadata, optionally mixed with <code>int8_tensorwise</code> layers</td>
<td><code>--transformer-weights-path</code> or <code>--component-paths.text_encoder</code></td>
<td>Native DiTs and encoders with matching parameter mappings; MiniMax-H3 FL2VA / Ref2VA DiTs and Qwen3-VL encoder layouts are recognized</td>
<td><code>comfy-kitchen</code></td>
<td>Auto-detected; omit <code>--quantization</code>. Packed INT4 weights use the checkpoint's W4A4 ConvRot kernel and <code>linear_dtype</code>. CUDA requires SM75+; TP must preserve the 64-element quantization and ConvRot group boundaries. Offload is supported and FSDP is not.</td>
<td>Auto-detected; omit <code>--quantization</code>. Each layer dispatches to its serialized W4A4 or INT8 ConvRot kernel. CUDA requires SM75+; TP must preserve each format's quantization and ConvRot group boundaries. Offload is supported and FSDP is not.</td>
</tr>
<tr>
<td><code>quanto-int8</code></td>