[AMD] Fix GLM-5 fp8 KV quant path dispatch on MI300 (#22314)
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@@ -45,7 +45,7 @@ from sglang.srt.layers.attention.nsa.quant_k_cache import (
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quantize_k_cache,
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quantize_k_cache,
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quantize_k_cache_separate,
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quantize_k_cache_separate,
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)
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)
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from sglang.srt.layers.quantization.fp8_kernel import is_fp8_fnuz
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from sglang.srt.layers.quantization.fp8_kernel import fp8_dtype, is_fp8_fnuz
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from sglang.srt.layers.radix_attention import RadixAttention
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from sglang.srt.layers.radix_attention import RadixAttention
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from sglang.srt.mem_cache.utils import (
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from sglang.srt.mem_cache.utils import (
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get_mla_kv_buffer_triton,
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get_mla_kv_buffer_triton,
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@@ -1575,13 +1575,9 @@ class MLATokenToKVPool(KVCache):
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):
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):
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layer_id = layer.layer_id
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layer_id = layer.layer_id
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if self.nsa_kv_cache_store_fp8:
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if _is_hip and self.use_nsa and self.dtype == fp8_dtype:
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if _is_hip:
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# HIP FP8 path uses raw MLA KV layout (nope + rope) without per-block scales.
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# HIP FP8 path uses raw MLA KV layout (nope + rope) without per-block scales.
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# Fuse BF16/FP16 -> FP8 cast with paged KV write.
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# Fuse BF16/FP16 -> FP8 cast with paged KV write.
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fp8_dtype = (
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torch.float8_e4m3fnuz if _is_fp8_fnuz else torch.float8_e4m3fn
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)
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set_mla_kv_buffer_triton_fp8_quant(
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set_mla_kv_buffer_triton_fp8_quant(
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self.kv_buffer[layer_id - self.start_layer],
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self.kv_buffer[layer_id - self.start_layer],
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loc,
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loc,
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@@ -1589,7 +1585,7 @@ class MLATokenToKVPool(KVCache):
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cache_k_rope,
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cache_k_rope,
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fp8_dtype,
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fp8_dtype,
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)
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)
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else:
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elif self.nsa_kv_cache_store_fp8:
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# OPTIMIZATION: Quantize k_nope and k_rope separately to avoid concat overhead
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# OPTIMIZATION: Quantize k_nope and k_rope separately to avoid concat overhead
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# This also enables reuse of set_mla_kv_buffer_triton two-tensor write path
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# This also enables reuse of set_mla_kv_buffer_triton two-tensor write path
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# quantize_k_cache_separate returns (nope_part, rope_part) as uint8 bytes
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# quantize_k_cache_separate returns (nope_part, rope_part) as uint8 bytes
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