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Cap SWA pool sizing with chunk cache (#28755)

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cctry
2026-06-21 01:06:59 -07:00
committed by GitHub
parent c9488241e9
commit 6d4ca9bc54
12 changed files with 398 additions and 36 deletions
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docs_new/docs/hardware-platforms/ascend-npus/ascend_npu_best_practice.mdx
+2 -4
View File
@@ -5799,9 +5799,8 @@ do
export GLOO_SOCKET_IFNAME=your_nic
export SGLANG_ENABLE_OVERLAP_PLAN_STREAM=1
export SGLANG_NPU_FUSED_MOE_MODE=2
export SGLANG_DISAGGREGATION_NUM_PRE_ALLOCATE_REQS=96
python -m sglang.launch_server --model-path ${MODEL_PATH} --disaggregation-mode decode --host ${D_IP[$i]} \
python -m sglang.launch_server --model-path ${MODEL_PATH} --disaggregation-mode decode --host ${D_IP[$i]} --disaggregation-decode-extra-slots 96 \
--cuda-graph-bs 8 16 24 32 40 \
--port 33000 --trust-remote-code \
--tp-size 16 --mem-fraction-static 0.76 --attention-backend ascend --device npu --quantization modelslim \
@@ -5934,9 +5933,8 @@ do
export GLOO_SOCKET_IFNAME=your_nic
export SGLANG_ENABLE_OVERLAP_PLAN_STREAM=1
export SGLANG_NPU_FUSED_MOE_MODE=2
export SGLANG_DISAGGREGATION_NUM_PRE_ALLOCATE_REQS=96
python -m sglang.launch_server --model-path ${MODEL_PATH} --disaggregation-mode decode --host ${D_IP[$i]} \
python -m sglang.launch_server --model-path ${MODEL_PATH} --disaggregation-mode decode --host ${D_IP[$i]} --disaggregation-decode-extra-slots 96 \
--cuda-graph-bs 2 4 8 \
--port 33000 --trust-remote-code \
--tp-size 16 --mem-fraction-static 0.76 --attention-backend ascend --device npu --quantization modelslim \
docs_new/docs/hardware-platforms/ascend-npus/best_practice/minimax_m2_5.mdx
+2 -2
View File
@@ -155,7 +155,6 @@ do
export HCCL_BUFFSIZE=1600
export HCCL_SOCKET_IFNAME=<network-interface>
export SGLANG_DEEPEP_NUM_MAX_DISPATCH_TOKENS_PER_RANK=640
export SGLANG_DISAGGREGATION_NUM_PRE_ALLOCATE_REQS=96
export SGLANG_ENABLE_OVERLAP_PLAN_STREAM=1
export SGLANG_ENABLE_SPEC_V2=1
export SGLANG_NPU_FUSED_MOE_MODE=2
@@ -172,6 +171,7 @@ do
--device npu \
--quantization modelslim \
--disaggregation-transfer-backend ascend \
--disaggregation-decode-extra-slots 96 \
--max-running-requests 80 \
--chunked-prefill-size -1 \
--moe-a2a-backend ascend_fuseep \
@@ -362,7 +362,6 @@ do
export HCCL_BUFFSIZE=1600
export HCCL_SOCKET_IFNAME=<network-interface>
export SGLANG_DEEPEP_NUM_MAX_DISPATCH_TOKENS_PER_RANK=640
export SGLANG_DISAGGREGATION_NUM_PRE_ALLOCATE_REQS=96
export SGLANG_ENABLE_OVERLAP_PLAN_STREAM=1
export SGLANG_ENABLE_SPEC_V2=1
export SGLANG_NPU_FUSED_MOE_MODE=2
@@ -379,6 +378,7 @@ do
--device npu \
--quantization modelslim \
--disaggregation-transfer-backend ascend \
--disaggregation-decode-extra-slots 96 \
--max-running-requests 80 \
--chunked-prefill-size -1 \
--moe-a2a-backend ascend_fuseep \