From 5e9032c527e698cbb49cae71fac418df75538a08 Mon Sep 17 00:00:00 2001
From: qinsir5522 <15769255522@163.com>
Date: Tue, 7 Jul 2026 16:01:51 +0800
Subject: [PATCH] [NPU]Modify LoRA heading in ascend_npu_support_features.mdx
 to specify Qwen model limitations. (#30358)

---
 .../ascend-npus/ascend_npu_support_features.mdx                 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs_new/docs/hardware-platforms/ascend-npus/ascend_npu_support_features.mdx b/docs_new/docs/hardware-platforms/ascend-npus/ascend_npu_support_features.mdx
index cd5a90232..9f0ebb5ec 100644
--- a/docs_new/docs/hardware-platforms/ascend-npus/ascend_npu_support_features.mdx
+++ b/docs_new/docs/hardware-platforms/ascend-npus/ascend_npu_support_features.mdx
@@ -1157,7 +1157,7 @@ click [Server Arguments](../../advanced_features/server_arguments).
   </tbody>
 </table>
 
-## LoRA
+## LoRA(Restrict the use Qwen Series Models)
 
 <table style={{width: "100%", borderCollapse: "collapse", tableLayout: "fixed"}}>
   <colgroup>